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212441 commits

Author SHA1 Message Date
Haochen Jiang
16daeb262a i386: Fix AVX512 intrin macro typo
There are several typo in AVX512 intrins macro define. Correct them to solve
errors when compiled with -O0.

gcc/ChangeLog:

	* config/i386/avx512dqintrin.h
	(_mm_mask_fpclass_ss_mask): Correct operand order.
	(_mm_mask_fpclass_sd_mask): Ditto.
	(_mm256_maskz_reduce_round_ss): Use __builtin_ia32_reducess_mask_round
	instead of __builtin_ia32_reducesd_mask_round.
	(_mm_reduce_round_sd): Use -1 as mask since it is non-mask.
	(_mm_reduce_round_ss): Ditto.
	* config/i386/avx512vlbwintrin.h
	(_mm256_mask_alignr_epi8): Correct operand usage.
	(_mm_mask_alignr_epi8): Ditto.
	* config/i386/avx512vlintrin.h (_mm_mask_alignr_epi64): Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx512bw-vpalignr-1b.c: New test.
	* gcc.target/i386/avx512dq-vfpclasssd-1b.c: Ditto.
	* gcc.target/i386/avx512dq-vfpclassss-1b.c: Ditto.
	* gcc.target/i386/avx512dq-vreducesd-1b.c: Ditto.
	* gcc.target/i386/avx512dq-vreducess-1b.c: Ditto.
	* gcc.target/i386/avx512vl-valignq-1b.c: Ditto.
2024-07-29 10:10:31 +08:00
GCC Administrator
b6bf054de7 Daily bump. 2024-07-29 00:16:31 +00:00
Sam James
542e3c4f05
testsuite: fix dg-add-options vs. dg-options ordering
Per gccint, dg-add-options must be placed after all dg-options directives.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/cmpmem-2.c: Fix dg-add-options order.
2024-07-29 00:40:04 +01:00
Sam James
0ac0e640a7
testsuite: fix dg-do ordering wrt dg-require-*
Per gccint, dg-do must precede dg-require-effective-target or
dg-require-support. Fix a handful of deviant cases.

gcc/testsuite/ChangeLog:
	PR middle-end/25521
	PR debug/93122
	* gcc.dg/pr25521.c: Fix dg-do directive order.
	* gcc.dg/vect/vect-simd-clone-19.c: Likewise.
	* gcc.target/arm/stack-protector-7.c: Likewise.
	* gcc.target/arm/stack-protector-8.c: Likewise.
	* gcc.target/powerpc/pr93122.c: Likewise.

libstdc++-v3/ChangeLog:
	PR libstdc++/110572
	* testsuite/18_support/type_info/110572.cc: Fix dg-do directive order.
2024-07-29 00:40:04 +01:00
Jason Merrill
d5f1948640 c++: if consteval and consteval propagation [PR115583]
During speculative constant folding of an if consteval, we take the false
branch, but the true branch is an immediate function context, so we don't
want to to cp_fold_immediate it.  So we could check IF_STMT_CONSTEVAL_P
here.  But beyond that, we don't want to do this inside a call, only when
first parsing a function.

	PR c++/115583

gcc/cp/ChangeLog:

	* constexpr.cc (cxx_eval_conditional_expression): Don't
	cp_fold_immediate for if consteval.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp23/consteval-if13.C: New test.
2024-07-28 17:38:52 -04:00
Jonathan Wakely
6a55ff2957
gcc: Make exec-tool.in handle missing Binutils more gracefully
When users try to build a cross-compiler without first installing
binutils they get confusing errors like:
/tmp/gcc-obj/./gcc/as: line 114: exec: -m: invalid option

This is an incredibly common source of questions on gcc-help and IRC,
and bogus bug reports e.g. see PR 116119 for the latest example.

This change adds an explicit check for an empty $original variable and
exits with a user-friendly error.

gcc/ChangeLog:

	* exec-tool.in: Exit with an error if $original is empty.
2024-07-28 20:02:23 +01:00
Georg-Johann Lay
0f1de0c4ce AVR target 116056 - Support attribute signal(n), interrupt(n) and noblock.
This patch adds support for arguments to the signal and interrupt
function attributes.  It allows to specify the ISR by means of the
associated IRQ number, in extension to the current attributes that
require to specify the ISR name like "__vector_1" as (assembly) name
for the function.  The new feature is more convenient, e.g. when the
ISR is implemented by a class method or in a namespace.  There is no
requirement that the ISR is externally visible.  The syntax is like:

__attribute__((signal(1, 2, ...), signal(3, 4, ...)))
[static] void isr_function (void)
{
    // Code
}

Moreover, this patch adds support for the "noblock" function attribute
to let an ISR start with a SEI instruction.  Attribute "signal" together
with "noblock" behaves like "interrupt" but without imposing a specific
function name or visibility like "interrupt" does.

	PR target/116056
gcc/
	* config/avr/avr.h (machine_function) <is_noblock>: New field.
	* config/avr/avr-c.cc (avr_cpu_cpp_builtins) <__HAVE_SIGNAL_N__>: New
	built-in macro.
	* config/avr/avr.cc (avr_declare_function_name): New function.
	(avr_attribute_table) <noblock>: New function attribute>.
	<signal, interrupt>: Allow any number of args.
	(avr_insert_attributes): Check validity of "signal" and "interrupt"
	arguments.
	(avr_foreach_function_attribute, avr_interrupt_signal_function)
	(avr_isr_number, avr_asm_isr_alias, avr_handle_isr_attribute)
	(avr_noblock_function_p): New static functions.
	(avr_interrupt_function): New from avr_interrupt_function_p.
	Adjust callers.
	(avr_signal_function): New from avr_signal_function_p.
	Adjust callers.
	(avr_set_current_function): Only diagnose non-__vector ISR names
	when "signal" or "interrupt" attribute has no args. Set
	cfun->machine->is_noblock.  Warn about "noblock" in non-ISR functions.
	(struct avr_fun_cookie): New.
	(avr_expand_prologue, avr_asm_function_end_prologue): Handle "noblock".
	* config/avr/elf.h (ASM_DECLARE_FUNCTION_NAME): New define.
	* config/avr/avr-protos.h (avr_declare_function_name): New proto.
	* doc/extend.texi (AVR Function Attributes): Document
	signal(num) and interrupt(num).
	* doc/invoke.texi (AVR Built-in Macros) <__HAVE_SIGNAL_N__>: Document.
gcc/testsuite/
	* gcc.target/avr/torture/signal_n-1.c: New test.
	* gcc.target/avr/torture/signal_n-2.c: New test.
	* gcc.target/avr/torture/signal_n-3.c: New test.
	* gcc.target/avr/torture/signal_n-4.cpp: New test.
2024-07-28 20:35:26 +02:00
Gaius Mulley
79e029a418 PR modula2/115823 Wrong expansion of isnormal optab
This patch corrects the function declaration of a builtin
(using the libname rather than the source name).

gcc/m2/ChangeLog:

	PR modula2/115823
	* gm2-gcc/m2builtins.cc (define_builtin): Build
	the function decl using the libname.

gcc/testsuite/ChangeLog:

	PR modula2/115823
	* gm2/builtins/run/pass/testisnormal.mod: Change to an
	implementation module.
	* gm2/builtins/run/pass/testisnormal.def: New test.
	* gm2/builtins/run/pass/testsinl.def: New test.
	* gm2/builtins/run/pass/testsinl.mod: New test.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2024-07-28 19:20:43 +01:00
John David Anglin
59c6d6a5b5 testsuite: Fix unaligned accesses in ipa-sra-8.c and ipa-sra-9.c
2024-07-28  John David Anglin  <danglin@gcc.gnu.org>

gcc/testsuite/ChangeLog:

	PR testsuite/92550
	* gcc.dg/ipa/ipa-sra-8.c: Change get_a argument	type to SSS.
	* gcc.dg/ipa/ipa-sra-9.c: Likewise.
2024-07-28 13:37:52 -04:00
Jonathan Wakely
dad2eb3ac2
Add config file so b4 uses inbox.sourceware.org automatically
This makes b4 use inbox.sourceware.org instead of the default host
lore.kernel.org, so that every b4 user doesn't have to configure this
themselves.

ChangeLog:

	* .b4-config: New file.
2024-07-28 11:13:16 +01:00
GCC Administrator
027bde11d4 Daily bump. 2024-07-28 00:16:41 +00:00
Jason Merrill
a9e9f772c7 c++: consteval propagation and templates [PR115986]
Here the call to e() makes us decide to check d() for escalation at EOF, but
while checking it we try to fold_immediate 0_c, and get confused by the
template trees.  Let's not mess with escalation for function templates.

	PR c++/115986

gcc/cp/ChangeLog:

	* cp-gimplify.cc (remember_escalating_expr): Skip function
	templates.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp2a/consteval-prop21.C: New test.
2024-07-27 16:26:04 -04:00
Jason Merrill
3129a2ed6a c++: ICE with concept, local class, and lambda [PR115561]
Here when we want to synthesize methods for foo()::B maybe_push_to_top_level
calls push_function_context, which sets cfun to a dummy value; later
finish_call_expr tries to set something in
cp_function_chain (i.e. cfun->language), which isn't set.  Many places in
the compiler check cfun && cp_function_chain to avoid this problem; here we
also want to check !cp_unevaluated_operand, like set_flags_from_callee does.

	PR c++/115561

gcc/cp/ChangeLog:

	* semantics.cc (finish_call_expr): Check cp_unevaluated_operand.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp2a/concepts-lambda21.C: New test.
2024-07-27 16:25:47 -04:00
Jason Merrill
dab0f35fcb c++: improve C++ testsuite default versions
I wanted to add more cases to the setting of std_list in g++-dg.exp, but
didn't want to do a full scan through the file for each case.  So this patch
improves that in two ways: first, by extracting all interesting lines on a
single pass; second, by generating the list more flexibly: now we test every
version mentioned explicitly in the testcase, plus a few more if fewer than
three are mentioned.

This also lowers changes from testing four to three versions for most
testcases: the current default and the earliest and latest versions.  This
will reduce testing of C++14 and C++20 modes, and increase testing of C++26
mode.  C++ front-end developers are encouraged to set the
GXX_TESTSUITE_STDS environment variable to test more modes.

gcc/testsuite/ChangeLog:

	* lib/gcc-dg.exp (get_matching_lines): New.
	* lib/g++-dg.exp: Improve std_list selection.
2024-07-27 16:24:04 -04:00
Roger Sayle
928116e94a Fold ctz(-x) and ctz(abs(x)) as ctz(x) in match.pd.
The subject line pretty much says it all; the count-trailing-zeros function
of -X and abs(X) produce the same result as count-trailing-zeros of X.
This transformation eliminates a negation which may potentially overflow
with an equivalent expression that doesn't [much like the analogous
abs(-X) simplification in match.pd].

I'd noticed this -X equivalence, which isn't mentioned in Hacker's Delight,
investigating whether ranger's non_zero_bits can help determine whether
an integer variable may be converted to a floating point type exactly
(without raising FE_INEXACT), but it turns out this observation isn't
novel, as (disappointingly) LLVM already performs this same folding.

2024-07-27  Roger Sayle  <roger@nextmovesoftware.com>
	    Andrew Pinski  <quic_apinski@quicinc.com>

gcc/ChangeLog
	* match.pd (ctz (-X) => ctz (X)): New simplification.
	(ctz (abs (X)) => ctz (X)): Likewise.

gcc/testsuite/ChangeLog
	* gcc.dg/fold-ctz-1.c: New test case.
	* gcc.dg/fold-ctz-2.c: Likewise.
2024-07-27 15:16:19 +01:00
Jonathan Wakely
f793be7871
libstdc++: Fix -Wsign-compare warning in <charconv>
Cast ptrdiff_t to size_t to avoid a -Wsign-compare warning. We can check
in __to_chars_i that the ptrdiff_t won't be negative, so that we know
the cast is safe.

libstdc++-v3/ChangeLog:

	* include/std/charconv (__to_chars_16, __to_chars_10)
	(__to_chars_8, __to_chars_2, __to_chars): Cast ptrdiff_t to
	size_t for comparison.
	(__to_chars_i): Check for first >= last instead of first == last
	for initial sanity check.
2024-07-27 12:47:39 +01:00
Jonathan Wakely
2da38b6a88
libstdc++: Add comment noting LWG 3617 support
The resolution was implemented in r14-8752-g6f75149488b74a but I didn't
add the usual _GLIBCXX_RESOLVE_LIB_DEFECTS comment.

libstdc++-v3/ChangeLog:

	* include/bits/std_function.h: Add comment about LWG 3617 being
	supported.
2024-07-27 12:47:39 +01:00
Jonathan Wakely
e69456ff9a
libstdc++: Remove __find_if unrolling for random access iterators
As the numbers in PR libstdc++/88545 show, the manual loop unrolling in
std::__find_if doesn't actually help these days, and it prevents the
compiler from auto-vectorizing.

Remove the dispatching on iterator_category and just use the simple loop
for all iterator categories.

libstdc++-v3/ChangeLog:

	* include/bits/stl_algobase.h (__find_if): Remove overloads for
	dispatching on iterator_category. Do not unroll loop manually.
	* include/bits/stl_algo.h (__find_if_not): Remove
	iterator_category argument from __find_if call.
2024-07-27 12:47:39 +01:00
Pan Li
6d79d53eed Match: Support .SAT_SUB with IMM op for form 1-4
This patch would like to support .SAT_SUB when one of the op
is IMM.  Aka below 1-4 forms.

Form 1:
 #define DEF_SAT_U_SUB_IMM_FMT_1(T, IMM) \
 T __attribute__((noinline))             \
 sat_u_sub_imm##IMM##_##T##_fmt_1 (T y)  \
 {                                       \
   return IMM >= y ? IMM - y : 0;        \
 }

Form 2:
  #define DEF_SAT_U_SUB_IMM_FMT_2(T, IMM) \
  T __attribute__((noinline))             \
  sat_u_sub_imm##IMM##_##T##_fmt_2 (T y)  \
  {                                       \
    return IMM > y ? IMM - y : 0;         \
  }

Form 3:
  #define DEF_SAT_U_SUB_IMM_FMT_3(T, IMM) \
  T __attribute__((noinline))             \
  sat_u_sub_imm##IMM##_##T##_fmt_3 (T x)  \
  {                                       \
    return x >= IMM ? x - IMM : 0;        \
  }

Form 4:
  #define DEF_SAT_U_SUB_IMM_FMT_4(T, IMM) \
  T __attribute__((noinline))             \
  sat_u_sub_imm##IMM##_##T##_fmt_4 (T x)  \
  {                                       \
    return x > IMM ? x - IMM : 0;         \
  }

Take below form 1 as example:

DEF_SAT_U_SUB_OP0_IMM_FMT_1(uint32_t, 11)

Before this patch:
   4   │ __attribute__((noinline))
   5   │ uint64_t sat_u_sub_imm11_uint64_t_fmt_1 (uint64_t y)
   6   │ {
   7   │   uint64_t _1;
   8   │   uint64_t _3;
   9   │
  10   │ ;;   basic block 2, loop depth 0
  11   │ ;;    pred:       ENTRY
  12   │   if (y_2(D) <= 11)
  13   │     goto <bb 3>; [50.00%]
  14   │   else
  15   │     goto <bb 4>; [50.00%]
  16   │ ;;    succ:       3
  17   │ ;;                4
  18   │
  19   │ ;;   basic block 3, loop depth 0
  20   │ ;;    pred:       2
  21   │   _3 = 11 - y_2(D);
  22   │ ;;    succ:       4
  23   │
  24   │ ;;   basic block 4, loop depth 0
  25   │ ;;    pred:       2
  26   │ ;;                3
  27   │   # _1 = PHI <0(2), _3(3)>
  28   │   return _1;
  29   │ ;;    succ:       EXIT
  30   │
  31   │ }

After this patch:
   4   │ __attribute__((noinline))
   5   │ uint64_t sat_u_sub_imm11_uint64_t_fmt_1 (uint64_t y)
   6   │ {
   7   │   uint64_t _1;
   8   │
   9   │ ;;   basic block 2, loop depth 0
  10   │ ;;    pred:       ENTRY
  11   │   _1 = .SAT_SUB (11, y_2(D)); [tail call]
  12   │   return _1;
  13   │ ;;    succ:       EXIT
  14   │
  15   │ }

The below test suites are passed for this patch:
1. The rv64gcv fully regression tests.
2. The x86 bootstrap tests.
3. The x86 fully regression tests.

gcc/ChangeLog:

	* match.pd: Add case 9 and case 10 for .SAT_SUB when one
	of the op is IMM.

Signed-off-by: Pan Li <pan2.li@intel.com>
2024-07-27 11:21:48 +08:00
David Malcolm
4d1f71d49e diagnostics: SARIF output: capture #include information (PR 107941; §3.34)
This patch extends our SARIF output to capture relationships between
locations within a result (§3.34).  In particular, this captures
chains of #includes relating to diagnostics and to events within
diagnostic paths.

For example, consider:

include-chain-1.c:

  #include "include-chain-1.h"

include-chain-1.h:

  /* First set of decls, which will be referenced in notes.  */
  #include "include-chain-1-1.h"

  /* Second set of decls, which will trigger the errors.  */
  #include "include-chain-1-2.h"

include-chain-1-1.h:

  int p;
  int q;

include-chain-1-1.h:

  char p;
  char q;

GCC's textual output emits:

  In file included from PATH/include-chain-1.h:5,
                   from PATH/include-chain-1.c:30:
  PATH/include-chain-1-2.h:1:6: error: conflicting types for 'p'; have 'char'
      1 | char p;
        |      ^
  In file included from PATH/include-chain-1.h:2:
  PATH/include-chain-1-1.h:1:5: note: previous declaration of 'p' with type 'int'
      1 | int p;
        |     ^
  PATH/include-chain-1-2.h:2:6: error: conflicting types for 'q'; have 'char'
      2 | char q;
        |      ^
  PATH/include-chain-1-1.h:2:5: note: previous declaration of 'q' with type 'int'
      2 | int q;
        |     ^

With this patch, the SARIF output captures the include information for
the two results, so that e.g. result[0]'s location[0] has:

  "relationships": [{"target": 0,
                     "kinds": ["isIncludedBy"]}],
  "id": 0

and the "note" in relatedLocations[0] has:

  "message": {"text": "previous declaration of 'q' with type 'int'"},
  "relationships": [{"target": 2,
                    "kinds": ["isIncludedBy"]}],
  "id": 2},

where these reference new locations within relatedLocations, such as this for
the "#include "include-chain-1-1.h" line in include-chain-1.h:

  {"physicalLocation": {"artifactLocation": {"uri": include-chain-1.h",
                                             "uriBaseId": "PWD"},
                        "region": {"startLine": 5},
                        "contextRegion": {"startLine": 5,
                                          "snippet": {"text": "#include \"include-chain-1-2.h\"\n"}}},
   "id": 1,
   "relationships": [{"target": 0,
                      "kinds": ["includes"]},
                     {"target": 4,
                      "kinds": ["isIncludedBy"]}]},

effectively capturing the inclusion digraph in SARIF form:

 +-----------------------------------+ +----------------------------------+
 |"id": 0                            | |"id": 2                           |
 | error: "conflicting types for 'p';| | note: previous declaration of 'p'|
 |  have 'char'"|                    | | with type 'int'")                |
 | in include-chain-1-2.h            | | in include-chain-1-1.h           |
 +-----------------------------------+ +----------------------------------+
                   |                                      |
                   | included-by                          | included-by
                   V                                      V
  +--------------------------------+    +--------------------------------+
  |"id": 1                         |    |"id": 3                         |
  | #include "include-chain-1-2.h" |    | #include "include-chain-1-1.h" |
  | in include-chain-1.h           |    | in include-chain-1.h           |
  +--------------------------------+    +--------------------------------+
                         |                      |
                         | included-by          | included-by
                         V                      V
                  +------------------------------------+
                  |"id": 4                             |
                  | The  #include "include-chain-1.h"  |
                  | in include-chain-1.c               |
                  +------------------------------------+

Locations only gain "id" fields if they need one, and the precise
numbering of the IDs within a result is an implementation detail (the
order in which references to the locations are made).

To test all this non-trivial JSON from DejaGnu I needed to adapt the
python testing code used by gcov, adding a new run-sarif-pytest based
on run-gcov-pytest.

gcc/ChangeLog:
	PR middle-end/107941
	* diagnostic-format-sarif.cc: Define INCLUDE_LIST and INCLUDE_MAP.
	(enum class location_relationship_kind): New.
	(diagnostic_artifact_role::scanned_file): New value.
	(class sarif_location_manager): New.
	(class sarif_result): Derive from sarif_location_manager rather
	than directly from sarif_object.
	(sarif_result::add_related_location): Convert to vfunc
	implementation.
	(sarif_location::m_relationships_map): New field.
	(class sarif_location_relationship): New.
	(class sarif_ice_notification): Derive from sarif_location_manager
	rather than directly from sarif_object.
	(sarif_builder::take_current_result): New.
	(sarif_builder::m_line_maps): New field.
	(sarif_builder::m_cur_group_result): Convert to std::unique_ptr.
	(sarif_artifact::add_role): Skip scanned_file.
	(get_artifact_role_string): Handle scanned_file.
	(sarif_location_manager::add_relationship_to_worklist): New.
	(sarif_location_manager::process_worklist): New.
	(sarif_location_manager::process_worklist_item): New.
	(sarif_result::on_nested_diagnostic): Pass *this to
	make_location_object.
	(sarif_location::lazily_add_id): New.
	(sarif_location::get_id): New.
	(get_string_for_location_relationship_kind): New.
	(sarif_location::lazily_add_relationship): New.
	(sarif_location::lazily_add_relationship_object): New.
	(sarif_location::lazily_add_relationships_array): New.
	(sarif_ice_notification::sarif_ice_notification): Fix overlong line.
	Pass *this to make_locations_arr.
	(sarif_ice_notification::add_related_location): New.
	(sarif_location_relationship::sarif_location_relationship): New.
	(sarif_location_relationship::get_target_id): New.
	(sarif_location_relationship::lazily_add_kind): New.
	(sarif_builder::sarif_builder): Add "line_maps" param and use it
	to initialize m_line_maps.
	(sarif_builder::end_diagnostic): Update for m_cur_group_result
	becoming a std::unique_ptr.  Don't append to m_results_array yet.
	(sarif_builder::end_group): Append m_cur_group_result to
	m_results_array here, rather than in end_diagnostic.
	(sarif_builder::make_result_object): Pass result_obj to
	make_locations_arr and to make_code_flow_object.
	(sarif_builder::make_locations_arr): Add "loc_mgr" param and pass
	it to make_location_object.
	(sarif_builder::make_location_object): For two overloads, add
	"loc_mgr" param and call add_any_include_chain on the location.
	(sarif_builder::add_any_include_chain): New.
	(sarif_builder::make_location_object): New overload.
	(sarif_builder::make_code_flow_object): Add "result" param and
	pass it to make_thread_flow_location_object.
	(sarif_builder::make_thread_flow_location_object): Add "result"
	param and pass it to make_location_object.
	(sarif_builder::get_or_create_artifact): Handle scanned_file.
	(sarif_output_format::~sarif_output_format): Assert that there
	isn't a pending result.
	(sarif_output_format::sarif_output_format): Add "line_maps" param
	and pass it to m_builder's ctor.
	(sarif_stream_output_format::sarif_stream_output_format): Add
	"line_maps" param and pass it to base class ctor.
	(sarif_file_output_format::sarif_file_output_format): Likewise.
	(diagnostic_output_format_init_sarif_stderr): Pass "line_table"
	global to format.
	(diagnostic_output_format_init_sarif_file): Likewise.
	(diagnostic_output_format_init_sarif_stream): Likewise.
	(test_sarif_diagnostic_context::test_sarif_diagnostic_context):
	Likewise.
	(buffered_output_format::buffered_output_format): Likewise.
	(selftest::test_make_location_object): Likewise.
	(selftest::test_make_location_object): Create a sarif_result for
	use when calling make_location_object.
	* diagnostic.cc (diagnostic_context::finish): End any active
	diagnostic groups.
	(diagnostic_context::report_diagnostic): Assert that we're within
	a diagnostic group.
	* diagnostic.h (diagnostic_report_diagnostic): Add
	begin_group/end_group pair around call to
	diagnostic_context::report_diagnostic.
	* selftest-diagnostic.cc (test_diagnostic_context::report): Add
	begin_group/end_group pair around diagnostic_impl call.

gcc/testsuite/ChangeLog:
	PR middle-end/107941
	* gcc.dg/sarif-output/include-chain-1-1.h: New test.
	* gcc.dg/sarif-output/include-chain-1-2.h: New test.
	* gcc.dg/sarif-output/include-chain-1.c: New test.
	* gcc.dg/sarif-output/include-chain-1.h: New test.
	* gcc.dg/sarif-output/include-chain-2.c: New test.
	* gcc.dg/sarif-output/include-chain-2.h: New test.
	* gcc.dg/sarif-output/sarif-output.exp: New file.
	* gcc.dg/sarif-output/sarif.py: New test, adapted from
	g++.dg/gcov/gcov.py.
	* gcc.dg/sarif-output/test-include-chain-1.py: New test.
	* gcc.dg/sarif-output/test-include-chain-2.py: New test.
	* lib/scansarif.exp (sarif-pytest-format-line): New, taken
	from lib/gcov.exp.
	(run-sarif-pytest): New, adapted from run-gcov-pytest in
	lib/gcov.exp.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-07-26 20:37:31 -04:00
GCC Administrator
be4042092c Daily bump. 2024-07-27 00:16:49 +00:00
Jeff Law
6e5aae47e3 [RISC-V][target/116085] Fix rv64 minmax extension avoidance splitter
A patch introduced a pattern to avoid unnecessary extensions when doing a
min/max operation where one of the values is a 32 bit positive constant.

> (define_insn_and_split "*minmax"
>   [(set (match_operand:DI 0 "register_operand" "=r")
>         (sign_extend:DI
>           (subreg:SI
>             (bitmanip_minmax:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r"))
>                                                 (match_operand:DI 2 "immediate_operand" "i"))
>            0)))
>    (clobber (match_scratch:DI 3 "=&r"))
>    (clobber (match_scratch:DI 4 "=&r"))]
>   "TARGET_64BIT && TARGET_ZBB && sext_hwi (INTVAL (operands[2]), 32) >= 0"
>   "#"
>   "&& reload_completed"
>   [(set (match_dup 3) (sign_extend:DI (match_dup 1)))
>    (set (match_dup 4) (match_dup 2))
>    (set (match_dup 0) (<minmax_optab>:DI (match_dup 3) (match_dup 4)))]

Lots going on in here.  The key is the nonconstant value is zero extended from
SI to DI in the original RTL and we know the constant value is unchanged if we
were to sign extend it from 32 to 64 bits.

We change the extension of the nonconstant operand from zero to sign extension.
I'm pretty confident the goal there is take advantage of the fact that SI
values are kept sign extended and will often be optimized away.

The problem occurs when the nonconstant operand has the SI sign bit set.  As an
example:

smax (0x8000000, 0x7)  resulting in 0x80000000

The split RTL will generate
smax (sign_extend (0x80000000), 0x7))

smax (0xffffffff80000000, 0x7) resulting in 0x7

Opps.

We really needed to change the opcode to umax for this transformation to work.
That's easy enough.  But there's further improvements we can make.

First the pattern is a define_and_split with a post-reload split condition.  It
would be better implemented as a 4->3 define_split so that the costing model
just works.  Second, if operands[1] is a suitably promoted subreg, then we can
elide the sign extension when we generate the split code, so often it'll be a
4->2 split, again with the cost model working with no adjustments needed.

Tested on rv32 and rv64 in my tester.  I'll wait for the pre-commit tester to
spin it as well.

	PR target/116085
gcc/
	* config/riscv/bitmanip.md (minmax extension avoidance splitter):
	Rewrite as a simpler define_split.  Adjust the opcode appropriately.
	Avoid emitting sign extension if it's clearly not needed.
	* config/riscv/iterators.md (minmax_optab): Rename to uminmax_optab
	and map everything to unsigned variants.

gcc/testsuite/
	* gcc.target/riscv/pr116085.c: New test.
2024-07-26 17:30:08 -06:00
Jason Merrill
ea381d87ec c++: trait as typename scope [PR116052]
The stdexec library currently wrongly ends up using __decay as the scope of
a typename, which leads to a crash.  Let's give an error instead.

	PR c++/116052

gcc/cp/ChangeLog:

	* mangle.cc (write_prefix): Handle TRAIT_EXPR.

gcc/testsuite/ChangeLog:

	* g++.dg/ext/decay1.C: New test.
2024-07-26 15:28:49 -04:00
Jakub Jelinek
2fb5bbe5ee testsuite: Fix up ucn-1.C for C++26
On Fri, Jul 26, 2024 at 11:43:13AM -0400, Jason Merrill wrote:
> I'm now seeing a -std=c++26 failure on g++.dg/cpp/ucn-1.C.

I don't remember seeing it when I wrote the patch, but today I see it as
well.

2024-07-26  Jakub Jelinek  <jakub@redhat.com>

	* g++.dg/cpp/ucn-1.C (main): Expect error on c\u0024c identifier also
	for C++26.
2024-07-26 21:01:03 +02:00
Sam James
a75c629525
testsuite: Add dg-do run to even more tests
All of these are for wrong-code bugs. Confirmed to be used before but
with no execution.

Tested on x86_64-pc-linux-gnu and checked test logs before/after.

2024-07-26  Sam James  <sam@gentoo.org>

	PR target/7559
	PR c++/9704
	PR c++/16115
	PR c++/19317
	PR rtl-optimization/11536
	PR target/20322
	PR tree-optimization/31966
	PR rtl-optimization/41033
	PR tree-optimization/67947
	* g++.dg/cpp1z/byte1.C: Add dg-do run directive.
	* g++.dg/init/call1.C: Ditto.
	* g++.dg/init/copy5.C: Ditto.
	* g++.dg/opt/nrv9.C: Ditto.
	* gcc.dg/20021006-1.c: Ditto.
	* gcc.dg/20030721-1.c: Ditto.
	* gcc.dg/20050307-1.c: Ditto.
	* gcc.dg/pr41033.c: Ditto.
	* gcc.dg/torture/pr67947.c: Ditto.
	* gcc.dg/tree-ssa/pr31966.c: Ditto.
	* gcc.dg/tree-ssa/tailcall-3.c: Ditto.
	* gcc.dg/tree-ssa/vrp74.c: Ditto.
	* gcc.target/nvptx/abort.c: Fix whitespace in dg directive.
2024-07-26 18:43:24 +01:00
Siddhesh Poyarekar
6fe1e1fad1 gimple-ssa-sprintf: Fix typo in range check
The code to scale ranges for wide chars in format_string incorrectly
checks range.likely to scale range.unlikely, which is a copy-paste typo
from the immediate previous condition.

gcc/ChangeLog:

	* gimple-ssa-sprintf.cc (format_string): Fix type in range check
	for UNLIKELY for wide chars.

Signed-off-by: Siddhesh Poyarekar <siddhesh@gotplt.org>
2024-07-26 13:34:11 -04:00
Andrew Pinski
795021d9bc aarch64: sve: Rename aarch64_bic to standard pattern, andn
Now there is an optab for bic, andn since r15-1890-gf379596e0ba99d.
This moves aarch64_bic for sve over to use it instead.

Note unlike the simd bic patterns, the operands were already
in the order that was expected for the optab so no swapping
was needed.

Built and tested on aarch64-linux-gnu with no regressions.

gcc/ChangeLog:

	* config/aarch64/aarch64-sve-builtins-base.cc (svbic_impl::expand): Update
	to use andn optab instead of using code_for_aarch64_bic.
	* config/aarch64/aarch64-sve.md (@aarch64_bic<mode>): Rename to ...
	(andn<mode>3): This.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-07-26 09:55:07 -07:00
Andrew Pinski
7e8e8a745a aarch64: Use iorn and andn standard pattern names for scalar modes
Since r15-1890-gf379596e0ba99d, these are the new optabs.
So let's use these names for them. These will be used to
generate during expand from gimple in the next few patches.

Built and tested for aarch64-linux-gnu with no regressions.

gcc/ChangeLog:

	* config/aarch64/aarch64.md (*<NLOGICAL:optab>_one_cmpl<mode>3): Rename to ...
	(<NLOGICAL:optab>n<mode>3): This.
	(*<NLOGICAL:optab>_one_cmplsidi3_ze): Rename to ...
	(*<NLOGICAL:optab>nsidi3_ze): This.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-07-26 09:54:58 -07:00
Andrew Pinski
245187de49 aarch64: Rename bic/orn patterns to iorn/andn for vector modes
This renames the patterns orn<mode>3 to iorn<mode>3 so it
matches the new optab that was added with r15-1890-gf379596e0ba99d.
Likewise for bic<mode>3 to andn<mode>3.

Note the operand 1 and operand 2 are swapped from the original
patterns to match the optab now.

Built and tested for aarch64-linux-gnu with no regression.

gcc/ChangeLog:

	* config/aarch64/aarch64-simd.md
	(bic<mode>3<vczle><vczbe>): Rename to ...
	(andn<mode>3<vczle><vczbe>): This. Also swap operands.
	(orn<mode>3<vczle><vczbe>): Rename to ...
	(iorn<mode>3<vczle><vczbe>): This. Also swap operands.
	(vec_cmp<mode><v_int_equiv>): Update orn call to iorn
	and swap the last two arguments.

gcc/testsuite/ChangeLog:

	* g++.target/aarch64/vect_cmp-1.C: New test.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-07-26 09:54:58 -07:00
Andrew Pinski
8a5f528fba aarch64: Fix target/optimize option handling with transiting between O1 to O2
The problem here is the aarch64 backend enables -mearly-ra at -O2 and above but
it is not marked as an Optimization in the .opt file so enabling it sometimes
reset the target options when going from -O1 to -O2 for the first time.

Build and tested for aarch64-linux-gnu with no regressions.

	PR target/116065

gcc/ChangeLog:

	* config/aarch64/aarch64.opt (mearly-ra=): Mark as Optimization rather
	than Save.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/sve/target_optimization-1.c: New test.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-07-26 09:54:57 -07:00
Andrew Pinski
9fe53beacf isel: Don't duplicate comparisons for -O0 nor -fno-tree-ter [PR116101]
While doing cleanups on this code I noticed that we do the duplicate
of comparisons at -O0. For C and C++ code this makes no difference as
the gimplifier never produces COND_EXPR. But it could make a difference
for other front-ends.
Oh and for -fno-tree-ter, duplicating the comparison is just a waste
as it is never used for expand.

I also decided to add a few testcases so this is checked in the future.
Even added one for the duplication itself.

Bootstrapped and tested on x86_64-linux-gnu with no regressions.

	PR tree-optimization/116101

gcc/ChangeLog:

	* gimple-isel.cc (maybe_duplicate_comparison): Don't
	do anything for -O0 or -fno-tree-ter.

gcc/testsuite/ChangeLog:

	* gcc.dg/tree-ssa/dup_compare_cond-1.c: New test.
	* gcc.dg/tree-ssa/dup_compare_cond-2.c: New test.
	* gcc.dg/tree-ssa/dup_compare_cond-3.c: New test.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-07-26 09:52:38 -07:00
Andrew Pinski
db74887097 isel: Small cleanup of duplicating comparisons
This is a small cleanup of the duplicating comparison code.
There is code generation difference but only for -O0 and -fno-tree-ter
(both of which will be fixed in a later patch).
The difference is instead of skipping the first use if the
comparison uses are only in cond_expr we skip the last use.
Also we go through the uses list in the opposite order now too.

The cleanups are the following:
* Don't call has_single_use as we will do the loop anyways
* Change the order of the checks slightly, it is better
  to check for cond_expr earlier
* Use cond_exprs as a stack and pop from it.
  Skipping the top if the use is only from cond_expr.

Bootstrapped and tested on x86_64-linux-gnu with no regressions.

gcc/ChangeLog:

	* gimple-isel.cc (duplicate_comparison): Rename to ...
	(maybe_duplicate_comparison): This. Add check for use here
	rather than in its caller.
	(pass_gimple_isel::execute): Don't check how many uses the
	comparison had and call maybe_duplicate_comparison instead of
	duplicate_comparison.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-07-26 09:52:38 -07:00
Andrew Pinski
9e7b2ad4ab isel: Move duplicate comparisons to its own function
This is just a small cleanup to isel and no functional changes just.
The loop inside pass_gimple_isel::execute looked was getting too
deap so let's fix that by moving it to its own function.

Bootstrapped and tested on x86_64-linux-gnu with no regressions.

gcc/ChangeLog:

	* gimple-isel.cc (pass_gimple_isel::execute): Factor out
	duplicate comparisons out to ...
	(duplicate_comparison): New function.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-07-26 09:52:37 -07:00
Andi Kleen
899ee48154 PR116019: Improve tail call error message
The "tail call must be the same type" message is common on some
targets with C++, or without optimization. It is generated
when gcc believes there is an access of the return value
after the call. However usually it does not actually corespond
to a type mismatch, but can be caused for other reasons.

Make it slightly more vague to be less misleading.

gcc/ChangeLog:

	PR c++/116019
	* tree-tailcall.cc (find_tail_calls): Change tail call
	error message.
2024-07-26 09:31:54 -07:00
Andi Kleen
ee41cd863b PR116080: Fix tail call dejagnu checks
- Run the target_effective tail_call checks without optimization to
match the actual test cases.
- Add an extra check for external tail calls to handle targets like
powerpc that cannot tail call between different object files.
This one will also cover templates.

gcc/testsuite/ChangeLog:

	PR testsuite/116080
	* g++.dg/musttail10.C: Use external tail call target check.
	* g++.dg/musttail6.C: Dito.
	* lib/target-supports.exp: Add external_tail_call. Disable
	optimization for tail call checks.
2024-07-26 09:31:54 -07:00
Sam James
7ad6b912d9
MAINTAINERS: Add myself to write after approval
ChangeLog:

	* MAINTAINERS: Add myself.
2024-07-26 16:58:02 +01:00
Robin Dapp
3f2bf415b4 RISC-V: Work around bare apostrophe in error string.
An unquoted apostrophe slipped through when testing the recent
V/M extension patch.  This, again, re-words the message to
"Currently the 'V' implementation requires the 'M' extension".

Going to commit as obvious after testing.

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_override_options_internal):
	Reword error string without apostrophe.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/pr116036.c: Adjust expected error
	string.
2024-07-26 14:17:08 +02:00
Tamar Christina
29e4e4bdb6 middle-end: check for vector mode before calling get_mask_mode [PR116074]
For historical reasons AArch64 has TI mode vector types but does not consider
TImode a vector mode.

What's happening in the PR is that get_vectype_for_scalar_type is returning
vector(1) TImode for a TImode scalar.  This then fails when we call
targetm.vectorize.get_mask_mode (vecmode).exists (&) on the TYPE_MODE.

This checks for vector mode before using the results of
get_vectype_for_scalar_type.

gcc/ChangeLog:

	PR target/116074
	* tree-vect-patterns.cc (vect_recog_cond_store_pattern): Check vector mode.

gcc/testsuite/ChangeLog:

	PR target/116074
	* g++.target/aarch64/pr116074.C: New test.
2024-07-26 13:02:53 +01:00
Haochen Jiang
f145f54116 i386: Use BLKmode for {ld,st}tilecfg
Hi all,

For AMX instructions related with memory, we will treat the memory
size as not specified since there won't be different size causing
confusion for memory.

This will change the output under Intel mode, which is broken for now when
using with assembler and aligns to current binutils behavior.

Bootstrapped and regtested on x86-64-pc-linux-gnu. Ok for trunk?

Thx,
Haochen

gcc/ChangeLog:

	* config/i386/i386-expand.cc (ix86_expand_builtin): Change
	from XImode to BLKmode.
	* config/i386/i386.md (ldtilecfg): Change XI to BLK.
	(sttilecfg): Ditto.
2024-07-26 16:49:08 +08:00
Nathaniel Shead
fd599d96d4 c++/modules: Stream warning suppressions [PR115757]
Currently we don't stream the contents of 'nowarn_map'; this means that
warning suppressions don't get applied in importers, which is
particularly relevant for templates (as in the linked testcase).

Rather than streaming the whole contents of 'nowarn_map', this patch
instead just streams the exported suppressions for each tree node
individually, to not build up additional locations and suppressions for
tree nodes that do not need to be streamed.

	PR c++/115757

gcc/cp/ChangeLog:

	* module.cc (trees_out::core_vals): Write warning specs for
	DECLs and EXPRs.
	(trees_in::core_vals): Read warning specs.

gcc/ChangeLog:

	* tree.h (put_warning_spec_at): Declare new function.
	(has_warning_spec): Likewise.
	(get_warning_spec): Likewise.
	(put_warning_spec): Likewise.
	* diagnostic-spec.h (nowarn_spec_t::from_bits): New function.
	* diagnostic-spec.cc (put_warning_spec_at): New function.
	* warning-control.cc (has_warning_spec): New function.
	(get_warning_spec): New function.
	(put_warning_spec): New function.

gcc/testsuite/ChangeLog:

	* g++.dg/modules/warn-spec-1_a.C: New test.
	* g++.dg/modules/warn-spec-1_b.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
2024-07-26 14:55:36 +10:00
GCC Administrator
18eb6ca136 Daily bump. 2024-07-26 00:17:23 +00:00
Jason Merrill
e397f8524a c++: #pragma target and deferred instantiation [PR115403]
My patch for 109753 applies the current #pragma target/optimize to a
function when we compile it, which was a problem for a template
instantiation deferred until EOF, where different #pragmas are active.  So
let's only do this for artificial functions.

	PR c++/115403
	PR c++/109753

gcc/cp/ChangeLog:

	* decl.cc (start_preparsed_function): Only call decl_attributes for
	artificial functions.

gcc/testsuite/ChangeLog:

	* g++.dg/ext/pragma-target1.C: New test.
2024-07-25 19:55:20 -04:00
Patrick Palka
5238367161 c++: non-template alias with dependent attributes [PR115897]
This patch generalizes our support for dependent attributes on alias
templates to also support them on non-template aliases.  The main
addition is a new predicate dependent_opaque_alias_p controlling whether
we can treat an alias (template or non-template) as type-equivalent to
its expansion.

	PR c++/115897

gcc/cp/ChangeLog:

	* cp-tree.h (dependent_opaque_alias_p): Declare.
	* pt.cc (push_template_decl): Manually mark a dependent opaque
	alias or dependent alias template specialization as dependent,
	and use structural equality for them.
	(dependent_opaque_alias_p): Define.
	(alias_template_specialization_p): Don't look through an
	opaque alias.
	(complex_alias_template_p): Use dependent_opaque_alias_p instead of
	any_dependent_template_arguments_p directly.
	(dependent_alias_template_spec_p): Don't look through an
	opaque alias.
	(get_underlying_template): Use dependent_opaque_alias_p instead of
	any_dependent_template_arguments_p.
	(instantiate_alias_template): Mention same logic in
	push_template_decl.
	(dependent_type_p_r): Remove dependent_alias_template_spec_p check.
	(any_template_arguments_need_structural_equality_p): Return true
	for a dependent opaque alias.
	(alias_ctad_tweaks): Use template_args_equal instead of same_type_p
	followed by dependent_alias_template_spec_p.
	* tree.cc (strip_typedefs): Don't strip an opaque alias.
	* typeck.cc (structural_comptypes): Compare declaration attributes
	for an opaque alias.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp0x/alias-decl-79.C: Remove xfails.
	* g++.dg/cpp0x/alias-decl-79a.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
2024-07-25 19:05:19 -04:00
Patrick Palka
9bcad23883 c++: alias of alias tmpl with dependent attrs [PR115897]
As a follow-up to r15-2047-g7954bb4fcb6fa8, we also need to consider
dependent attributes when recursing into a non-template alias that names
a dependent alias template specialization (and so STF_STRIP_DEPENDENT
is set), otherwise in the first testcase below we undesirably strip B
all the way to T instead of to A<T>.

We also need to move the typedef recursion case of strip_typedefs up to
get checked before the compound type recursion cases.  Otherwise for C
below (which ultimately aliases T*) we end up stripping it to T* instead
of to A<T*> because the POINTER_TYPE recursion dominates the typedef
recursion.  It also means we issue an unexpected extra error in the
third testcase below.

Ideally we would also want to consider dependent attributes on
non-template aliases, so that we accept the second testcase below, but
making that work correctly would require broader changes to e.g.
structural_comptypes.

	PR c++/115897

gcc/cp/ChangeLog:

	* tree.cc (strip_typedefs): Move up the typedef recursion case.
	Never strip a dependent alias template-id that has dependent
	attributes.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp0x/alias-decl-78.C: New test.
	* g++.dg/cpp0x/alias-decl-79.C: New test.
	* g++.dg/cpp0x/alias-decl-pr92206-1a.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
2024-07-25 19:00:23 -04:00
Carl Love
dafd1247b1 rs6000, remove built-ins __builtin_vsx_set_1ti, __builtin_vsx_set_2df, __builtin_vsx_set_2di
The built-ins set a value in a vector.  The same operation can be done
in C-code.  The assembly code generated from the C-code is as good or
better than the code generated by the built-ins.  With default
optimization the number of assembly generated for the two methods are
similar.  With -O3 optimization, the assembly generated for the two
approaches is identical for the 2DF and 2DI types.  The assembly for
the C-code version of the 1Ti requires one less assembly instruction.
It also only uses one load versus two loads for the built-in.

With the removal of the built-ins, there are no other uses of the
set built-in attribute.  The code associated with the set built-in
attribute is removed.

Finally, the testcase for the __builtin_vsx_set_2df is removed.  The
other built-ins do not have testcases.

gcc/ChangeLog:
	* config/rs6000/rs6000-builtin.cc (get_element_number,
	altivec_expand_vec_set_builtin): Remove functions.
	(rs6000_expand_builtin): Remove the if statement to call
	altivec_expand_vec_set_builtin.
	* config/rs6000/rs6000-builtins.def (__builtin_vsx_set_1ti,
	__builtin_vsx_set_2df, __builtin_vsx_set_2di): Remove the
	built-in definitions.
	* config/rs6000/rs6000-gen-builtins.cc (struct attrinfo):
	Remove the isset variable from the structure.
	(parse_bif_attrs): Remove the uses of the isset variable.

gcc/testsuite/ChangeLog:
	* gcc.target/powerpc/vsx-builtin-3.c: Remove test cases for the
	__builtin_vsx_set_2df built-in.
2024-07-25 18:59:00 -04:00
Carl Love
9ecf36b6f1 rs6000, Remove __builtin_vec_set_v1ti, __builtin_vec_set_v2df, __builtin_vec_set_v2di
This patch removes the __builtin_vec_set_v1ti, __builtin_vec_set_v2df
and __builtin_vec_set_v2di built-ins.  The users should just use
normal C-code to update the various vector elements.  This change was
originally intended to be part of the earlier series of cleanup
patches.  It was initially thought that some additional work would be
needed to do some gimple generation instead of these built-ins.
However, the existing default code generation does produce the needed
code.    For the vec_set bif, the equivalent C code is as good or
better than the built-in.  For the vec_insert bif whose resolving
previously made use of the vec_set bif, the assembly code generation
is as good as before with the -O3 optimization.

Remove the built-ins, use the default gimple generation instead.

gcc/ChangeLog:
	* config/rs6000/rs6000-builtins.def (__builtin_vec_set_v1ti,
	__builtin_vec_set_v2df, __builtin_vec_set_v2di): Remove built-in
	definitions.
	* config/rs6000/rs6000-c.cc (resolve_vec_insert): Remove the
	handling for constant vec_insert position with
	VECTOR_UNIT_VSX_P V1TImode, V2DFmode and V2DImode modes.
2024-07-25 18:58:49 -04:00
Carl Love
6689c58741 rs6000, remove __builtin_vsx_xvcmp* built-ins
This patch removes the built-ins:
 __builtin_vsx_xvcmpeqsp, __builtin_vsx_xvcmpgesp,
 __builtin_vsx_xvcmpgtsp.

which are similar to the recommended PVIPR documented overloaded
vec_cmpeq, vec_cmpgt and vec_cmpge built-ins.

The difference is that the overloaded built-ins return a vector of
32-bit booleans.  The removed built-ins returned a vector of floats.

The __builtin_vsx_xvcmpeqdp, __builtin_vsx_xvcmpgedp and
__builtin_vsx_xvcmpgtdp are not removed as they are used by the
overloaded vec_cmpeq, vec_cmpgt and vec_cmpge built-ins.

The test cases for the __builtin_vsx_xvcmpeqsp, __builtin_vsx_xvcmpgesp,
__builtin_vsx_xvcmpgtsp, __builtin_vsx_xvcmpeqdp,
__builtin_vsx_xvcmpgedp and __builtin_vsx_xvcmpgtdp  are changed to use
the overloaded vec_cmpeq, vec_cmpgt, vec_cmpge built-ins.  Use of the
overloaded built-ins requires the result to be stored in a vector of
boolean of the appropriate size or the result must be cast to the return
type used by the original __builtin_vsx_xvcmp* built-ins.

gcc/ChangeLog:
	* config/rs6000/rs6000-builtins.def (__builtin_vsx_xvcmpeqsp,
	__builtin_vsx_xvcmpgesp, __builtin_vsx_xvcmpgtsp): Remove
	definitions.

gcc/testsuite/ChangeLog:
	* gcc.target/powerpc/vsx-builtin-3.c (do_cmp): Replace
	__builtin_vsx_xvcmp{eq,gt,ge}{sp,dp} by vec_cmp{eq,gt,ge}
	respectively and add explicit casts to vector {float,double}.
	Add more testing code assigning result to vector boolean types.
2024-07-25 18:58:39 -04:00
Jonathan Wakely
ea435261ad
libstdc++: Add static_assert to std::expected for LWG 3843 and 3940
libstdc++-v3/ChangeLog:

	* include/std/expected (expected::value): Add assertions for LWG
	3843 requirements.
	(expected<cv void, E>::value): Add assertions for LWG 3940
	requirements.
2024-07-25 23:10:36 +01:00
Jonathan Wakely
5be55447e2
libstdc++: Remove std::basic_format_args default constructor (LWG 4106)
There's no valid use case for default constructing this type, so the
committee approved removing the default constructor.

libstdc++-v3/ChangeLog:

	* include/std/format (basic_format_args): Remove default
	constructor, as per LWG 4106.
	* testsuite/std/format/arguments/args.cc: Check it isn't default
	constructible.
2024-07-25 23:10:35 +01:00
Jonathan Wakely
1489e281b5
libstdc++: Implement P2968R2 "Making std::ignore a first-class object"
This was recently approved for C++26, but we can apply the changes for
all modes back to C++11. There's no reason not to make the assignment
usable in constant expressions for C++11 mode, and noexcept for all
modes.

Move the definitions to <bits/utility.h> so they're available in
<utility> as well as <tuple>.

libstdc++-v3/ChangeLog:

	* include/bits/utility.h (_Swallow_assign): Make assignment
	constexpr for C++11 as well, and add noexcept.
	* include/std/tuple (_Swallow_assign, ignore): Move to
	bits/utility.h.
	* testsuite/20_util/headers/utility/ignore.cc: New test.
2024-07-25 23:10:35 +01:00