RISC-V: Fix VSETVL PASS AVL/VL fetch bug[111295]

Fix bugzilla: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111295

gcc/ChangeLog:

	PR target/111295
	* config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.

gcc/testsuite/ChangeLog:

	PR target/111295
	* gcc.target/riscv/rvv/autovec/pr111295.c: New test.
This commit is contained in:
Juzhe-Zhong 2023-09-06 20:47:24 +08:00 committed by Pan Li
parent ee21f79f72
commit 1b4c70d427
2 changed files with 37 additions and 2 deletions

View file

@ -721,8 +721,7 @@ insert_vsetvl (enum emit_type emit_type, rtx_insn *rinsn,
gcc_assert (has_vtype_op (rinsn) || vsetvl_insn_p (rinsn));
/* For user vsetvli a5, zero, we should use get_vl to get the VL
operand "a5". */
rtx vl_op
= vsetvl_insn_p (rinsn) ? get_vl (rinsn) : info.get_avl_reg_rtx ();
rtx vl_op = info.get_avl_or_vl_reg ();
gcc_assert (!vlmax_avl_p (vl_op));
emit_vsetvl_insn (VSETVL_NORMAL, emit_type, info, vl_op, rinsn);
return VSETVL_NORMAL;

View file

@ -0,0 +1,36 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv -mabi=lp64d -Ofast -ftree-vectorize --param=riscv-autovec-preference=scalable -Wno-implicit-function-declaration" } */
#include <stdbool.h>
int a, b, c, e, f, g, h, i, j, k;
long l;
int q ()
{
int r ();
char *o, *d;
_Bool p = f;
while (g)
{
int m, n;
for (; m <= n; m++)
*d++ = m;
k = 1;
if (e)
break;
switch (*o)
{
case 'N':
o++;
if (c)
if (h)
while (i)
{
s (-l, ~0);
t (j);
d = d + (a & 10000000 ? u (r, 2) : b);
}
}
if (*o)
p ? s () : 0;
}
}