diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index e7e5c14617e..dd9aeb32b56 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -721,8 +721,7 @@ insert_vsetvl (enum emit_type emit_type, rtx_insn *rinsn, gcc_assert (has_vtype_op (rinsn) || vsetvl_insn_p (rinsn)); /* For user vsetvli a5, zero, we should use get_vl to get the VL operand "a5". */ - rtx vl_op - = vsetvl_insn_p (rinsn) ? get_vl (rinsn) : info.get_avl_reg_rtx (); + rtx vl_op = info.get_avl_or_vl_reg (); gcc_assert (!vlmax_avl_p (vl_op)); emit_vsetvl_insn (VSETVL_NORMAL, emit_type, info, vl_op, rinsn); return VSETVL_NORMAL; diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111295.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111295.c new file mode 100644 index 00000000000..fa20a21338a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111295.c @@ -0,0 +1,36 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -Ofast -ftree-vectorize --param=riscv-autovec-preference=scalable -Wno-implicit-function-declaration" } */ + +#include +int a, b, c, e, f, g, h, i, j, k; +long l; +int q () +{ + int r (); + char *o, *d; + _Bool p = f; + while (g) + { + int m, n; + for (; m <= n; m++) + *d++ = m; + k = 1; + if (e) + break; + switch (*o) + { + case 'N': + o++; + if (c) + if (h) + while (i) + { + s (-l, ~0); + t (j); + d = d + (a & 10000000 ? u (r, 2) : b); + } + } + if (*o) + p ? s () : 0; + } +}