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arm: Auto-vectorization for MVE clean condition for vand and vorr expanders

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The patch restores the unconditional definition of the VDQ iterator,
and changes the conditions of the vand and vorr expanders to use
ARM_HAVE_<MODE>_ARITH.

2020-12-11  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	* config/arm/iterators.md (VDQ): Remove TARGET_HAVE_MVE
	conditions.
	* config/arm/vec-common.md (and<mode>3): Use
	ARM_HAVE_<MODE>_ARITH.
	(ior<mode>3): Likewise.
This commit is contained in:
Christophe Lyon 2020-12-11 16:46:26 +00:00
parent 78e9cfe1e2
commit e36ce56e81
2 changed files with 3 additions and 10 deletions
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7
gcc/config/arm/iterators.md
View file

@ -147,12 +147,7 @@
(define_mode_iterator VN [V8HI V4SI V2DI])
;; All supported vector modes (except singleton DImode).
(define_mode_iterator VDQ [(V8QI "!TARGET_HAVE_MVE") V16QI
(V4HI "!TARGET_HAVE_MVE") V8HI
(V2SI "!TARGET_HAVE_MVE") V4SI
(V4HF "!TARGET_HAVE_MVE") V8HF
(V2SF "!TARGET_HAVE_MVE") V4SF
(V2DI "!TARGET_HAVE_MVE")])
(define_mode_iterator VDQ [V8QI V16QI V4HI V8HI V2SI V4SI V4HF V8HF V2SF V4SF V2DI])
;; All supported floating-point vector modes (except V2DF).
(define_mode_iterator VF [(V4HF "TARGET_NEON_FP16INST")

6
gcc/config/arm/vec-common.md
View file

@ -177,14 +177,12 @@
[(set (match_operand:VDQ 0 "s_register_operand" "")
(and:VDQ (match_operand:VDQ 1 "s_register_operand" "")
(match_operand:VDQ 2 "neon_inv_logic_op2" "")))]
"TARGET_NEON
|| TARGET_HAVE_MVE"
"ARM_HAVE_<MODE>_ARITH"
)
(define_expand "ior<mode>3"
[(set (match_operand:VDQ 0 "s_register_operand" "")
(ior:VDQ (match_operand:VDQ 1 "s_register_operand" "")
(match_operand:VDQ 2 "neon_logic_op2" "")))]
"TARGET_NEON
|| TARGET_HAVE_MVE"
"ARM_HAVE_<MODE>_ARITH"
)