diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index f0e1d605cd0..5fcb7afe565 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -147,12 +147,7 @@ (define_mode_iterator VN [V8HI V4SI V2DI]) ;; All supported vector modes (except singleton DImode). -(define_mode_iterator VDQ [(V8QI "!TARGET_HAVE_MVE") V16QI - (V4HI "!TARGET_HAVE_MVE") V8HI - (V2SI "!TARGET_HAVE_MVE") V4SI - (V4HF "!TARGET_HAVE_MVE") V8HF - (V2SF "!TARGET_HAVE_MVE") V4SF - (V2DI "!TARGET_HAVE_MVE")]) +(define_mode_iterator VDQ [V8QI V16QI V4HI V8HI V2SI V4SI V4HF V8HF V2SF V4SF V2DI]) ;; All supported floating-point vector modes (except V2DF). (define_mode_iterator VF [(V4HF "TARGET_NEON_FP16INST") diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-common.md index df0a6cda3d5..8d9c89c5b2b 100644 --- a/gcc/config/arm/vec-common.md +++ b/gcc/config/arm/vec-common.md @@ -177,14 +177,12 @@ [(set (match_operand:VDQ 0 "s_register_operand" "") (and:VDQ (match_operand:VDQ 1 "s_register_operand" "") (match_operand:VDQ 2 "neon_inv_logic_op2" "")))] - "TARGET_NEON - || TARGET_HAVE_MVE" + "ARM_HAVE__ARITH" ) (define_expand "ior3" [(set (match_operand:VDQ 0 "s_register_operand" "") (ior:VDQ (match_operand:VDQ 1 "s_register_operand" "") (match_operand:VDQ 2 "neon_logic_op2" "")))] - "TARGET_NEON - || TARGET_HAVE_MVE" + "ARM_HAVE__ARITH" )