Daily bump.
This commit is contained in:
GCC Administrator
parent
f102b82d3d
commit
d5b3d9ed34
10 changed files with 722 additions and 1 deletions
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@ -1,3 +1,8 @@
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2024-12-10 David Malcolm <dmalcolm@redhat.com>
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* gcc-changelog/git_commit.py (bug_components): Add
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'libgdiagnostics' and 'sarif-replay'.
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2024-12-09 Matthew Malcomson <mmalcomson@nvidia.com>
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* clang-format: AlwaysBreakAfterReturnType set to
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205
gcc/ChangeLog
205
gcc/ChangeLog
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@ -1,3 +1,208 @@
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2024-12-10 David Malcolm <dmalcolm@redhat.com>
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PR other/117944
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* libsarifreplay.cc (sarif_replayer::handle_result_obj): Get any
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helpUri from the rule_obj and pass it to add_rule.
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2024-12-10 Vladimir N. Makarov <vmakarov@redhat.com>
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PR rtl-optimization/117946
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* lra-assigns.cc: (find_hard_regno_for_1): Use the biggest mode to
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check ira_prohibited_class_mode_regs.
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2024-12-10 Marek Polacek <polacek@redhat.com>
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PR c++/117880
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* fold-const.cc (operand_compare::operand_equal_p) <case tcc_unary>:
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Use OP_SAME_WITH_NULL instead of OP_SAME.
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2024-12-10 Wilco Dijkstra <wilco.dijkstra@arm.com>
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PR target/117675
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* config/arm/arm.cc (arm_ldrd_legitimate_address): New function.
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* config/arm/arm-protos.h (arm_ldrd_legitimate_address): New prototype.
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* config/arm/constraints.md: Add new Uo constraint.
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* config/arm/predicates.md (arm_ldrd_memory_operand): Add new predicate.
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* config/arm/sync.md (arm_atomic_loaddi2_ldrd): Use
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arm_ldrd_memory_operand and Uo.
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2024-12-10 Wilco Dijkstra <wilco.dijkstra@arm.com>
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* config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNE_BASE): New define.
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* config/aarch64/tuning_models/ampere1b.h: Use AARCH64_EXTRA_TUNE_BASE.
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* config/aarch64/tuning_models/cortexx925.h: Likewise.
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* config/aarch64/tuning_models/fujitsu_monaka.h: Likewise.
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* config/aarch64/tuning_models/generic_armv8_a.h: Likewise.
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* config/aarch64/tuning_models/generic_armv9_a.h: Likewise.
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* config/aarch64/tuning_models/neoversen1.h: Likewise.
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* config/aarch64/tuning_models/neoversen2.h: Likewise.
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* config/aarch64/tuning_models/neoversen3.h: Likewise.
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* config/aarch64/tuning_models/neoversev1.h: Likewise.
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* config/aarch64/tuning_models/neoversev2.h: Likewise.
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* config/aarch64/tuning_models/neoversev3.h: Likewise.
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* config/aarch64/tuning_models/neoversev3ae.h: Likewise.
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2024-12-10 Wilco Dijkstra <wilco.dijkstra@arm.com>
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* config/aarch64/aarch64.h (AARCH64_EXPAND_ALIGNMENT): Remove.
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(DATA_ALIGNMENT): Use aarch64_data_alignment.
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(LOCAL_ALIGNMENT): Use aarch64_stack_alignment.
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* config/aarch64/aarch64.cc (aarch64_data_alignment): New function.
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(aarch64_stack_alignment): Likewise.
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* config/aarch64/aarch64-protos.h (aarch64_data_alignment): New prototype.
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(aarch64_stack_alignment): Likewise.
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2024-12-10 Wilco Dijkstra <wdijkstr@ip-10-252-53-150.eu-west-1.compute.internal>
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* config/aarch64/aarch64.cc (aarch64_classify_address): Treat SIMD structs
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identically in little and bigendian.
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* config/aarch64/aarch64-simd.md (aarch64_mov<mode>): Remove VSTRUCT
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instructions.
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(aarch64_be_mov<mode>): Allow little-endian, rename to aarch64_mov<mode>.
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(aarch64_be_movoi): Allow little-endian, rename to aarch64_movoi.
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(aarch64_be_movci): Allow little-endian, rename to aarch64_movci.
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(aarch64_be_movxi): Allow little-endian, rename to aarch64_movxi.
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Remove big-endian special case in define_split variants.
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2024-12-10 Arsen Arsenović <arsen@aarsen.me>
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Iain Sandoe <iain@sandoe.co.uk>
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* dumpfile.cc (FIRST_ME_AUTO_NUMBERED_DUMP): Bump to 6 for sake
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of the coroutine dump.
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2024-12-10 Richard Sandiford <richard.sandiford@arm.com>
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* doc/md.texi (vcond@var{m}@var{n}, vcondu@var{m}@var{n})
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(vcondeq@var{m}@var{n}): Delete.
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(vcond_mask_@var{m}@var{n}): Redocument in standalone form.
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* internal-fn.def (VCOND, VCONDU, VCONDEQ): Delete.
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* internal-fn.cc (expand_vec_cond_optab_fn): Delete.
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* optabs.def (vcond_optab, vcondu_optab, vcondeq_optab): Delete.
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2024-12-10 Richard Sandiford <richard.sandiford@arm.com>
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* config/aarch64/aarch64-protos.h (aarch64_expand_sve_vcond): Delete.
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* config/aarch64/aarch64-simd.md (<su><maxmin>v2di3): Expand into
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separate vec_cmp and vcond_mask instructions, instead of using vcond.
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(vcond<mode><mode>, vcond<v_cmp_mixed><mode>, vcondu<mode><mode>)
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(vcondu<mode><v_cmp_mixed>): Delete.
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* config/aarch64/aarch64-sve.md (vcond<SVE_ALL:mode><SVE_I:mode>)
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(vcondu<SVE_ALL:mode><SVE_I:mode>, vcond<mode><v_fp_equiv>): Likewise.
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* config/aarch64/aarch64.cc (aarch64_expand_sve_vcond): Likewise.
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* config/aarch64/iterators.md (V_FP_EQUIV, v_fp_equiv, V_cmp_mixed)
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(v_cmp_mixed): Likewise.
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2024-12-10 Saurabh Jha <saurabh.jha@arm.com>
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Richard Sandiford <richard.sandiford@arm.com>
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* config/aarch64/aarch64-builtins.cc
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(aarch64_pragma_builtins_checker::require_immediate_lane_index): New
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overload.
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(aarch64_pragma_builtins_checker::check): Add support for FP8FMA
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intrinsics.
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(aarch64_expand_pragma_builtins): Likewise.
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* config/aarch64/aarch64-c.cc
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(aarch64_update_cpp_builtins): Conditionally define TARGET_FP8FMA.
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* config/aarch64/aarch64-simd-pragma-builtins.def: Add the FP8FMA
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intrinsics.
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* config/aarch64/aarch64-simd.md:
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(@aarch64_<FMLAL_FP8_HF:insn><mode): New pattern.
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(@aarch64_<FMLAL_FP8_HF:insn>_lane<V8HF_ONLY:mode><VB:mode>):
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Likewise.
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(@aarch64_<FMLALL_FP8_SF:insn><mode): Likewise.
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(@aarch64_<FMLALL_FP8_SF:insn>_lane<V8HF_ONLY:mode><VB:mode>):
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Likewise.
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* config/aarch64/iterators.md (V8HF_ONLY): New mode iterator.
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(SVE2_FP8_TERNARY_VNX8HF): Rename to...
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(FMLAL_FP8_HF): ...this.
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(SVE2_FP8_TERNARY_LANE_VNX8HF): Delete in favor of FMLAL_FP8_HF.
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(SVE2_FP8_TERNARY_VNX4SF): Rename to...
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(FMLALL_FP8_SF): ...this.
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(SVE2_FP8_TERNARY_LANE_VNX4SF): Delete in favor of FMLALL_FP8_SF.
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(sve2_fp8_fma_op_vnx8hf, sve2_fp8_fma_op_vnx4sf): Fold into...
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(insn): ...here.
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* config/aarch64/aarch64-sve2.md: Update uses accordingly.
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2024-12-10 Saurabh Jha <saurabh.jha@arm.com>
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Richard Sandiford <richard.sandiford@arm.com>
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* config/aarch64/aarch64-builtins.cc
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(enum class): Add ternary_lane.
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(aarch64_fntype): Hnadle ternary_lane.
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(aarch64_pragma_builtins_checker::require_immediate_lane_index): New
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function.
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(aarch64_pragma_builtins_checker::check): Handle the new intrinsics.
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(aarch64_expand_pragma_builtin): Likewise.
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* config/aarch64/aarch64-c.cc
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(aarch64_update_cpp_builtins): Define TARGET_FP8DOT2 and
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TARGET_FP8DOT4.
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* config/aarch64/aarch64-simd-pragma-builtins.def: Define vdot
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and vdot_lane intrinsics.
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* config/aarch64/aarch64-simd.md
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(@aarch64_<fpm_uns_op><mode>): New pattern.
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(@aarch64_<fpm_uns_op>_lane<VQ_HSF_VDOT:mode><VB:mode>): Likewise.
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* config/aarch64/iterators.md (VQ_HSF_VDOT): New mode iterator.
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(UNSPEC_VDOT, UNSPEC_VDOT_LANE): New unspecs.
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(fpm_uns_op): Handle them.
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(VNARROWB, Vnbtype): New mode attributes.
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(FPM_VDOT, FPM_VDOT_LANE): New int iterators.
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2024-12-10 Saurabh Jha <saurabh.jha@arm.com>
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Richard Sandiford <richard.sandiford@arm.com>
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* config/aarch64/aarch64-builtins.cc
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(FLAG_USES_FPMR, FLAG_FP8): New flags.
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(ENTRY): Modified to support ternary operations.
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(enum class): New variants to support new signatures.
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(struct aarch64_pragma_builtins_data): Extend types to 4 elements.
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(aarch64_fntype): Handle new signatures.
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(aarch64_get_low_unspec): New function.
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(aarch64_convert_to_v64): New function, split out from...
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(aarch64_expand_pragma_builtin): ...here. Handle new signatures.
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* config/aarch64/aarch64-c.cc
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(aarch64_update_cpp_builtins): New flag for FP8.
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* config/aarch64/aarch64-simd-pragma-builtins.def: Define new fp8
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intrinsics.
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(ENTRY_BINARY, ENTRY_BINARY_LANE): Update for new ENTRY interface.
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(ENTRY_UNARY, ENTRY_TERNARY, ENTRY_UNARY_FPM): New macros.
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(ENTRY_BINARY_VHSDF_SIGNED): Likewise.
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* config/aarch64/aarch64-simd.md
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(@aarch64_<fpm_uns_op><mode>): New pattern.
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(@aarch64_<fpm_uns_op><mode>_high): Likewise.
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(@aarch64_<fpm_uns_op><mode>_high_be): Likewise.
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(@aarch64_<fpm_uns_op><mode>_high_le): Likewise.
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* config/aarch64/iterators.md (V4SF_ONLY, VQ_BHF): New mode iterators.
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(UNSPEC_FCVTN_FP8, UNSPEC_FCVTN2_FP8, UNSPEC_F1CVTL_FP8)
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(UNSPEC_F1CVTL2_FP8, UNSPEC_F2CVTL_FP8, UNSPEC_F2CVTL2_FP8)
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(UNSPEC_FSCALE): New unspecs.
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(VPACKB, VPACKBtype): New mode attributes.
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(b): Add support for V[48][BH]F.
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(FPM_UNARY_UNS, FPM_BINARY_UNS, SCALE_UNS): New int iterators.
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(insn): New int attribute.
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2024-12-10 Richard Biener <rguenther@suse.de>
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PR tree-optimization/117912
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* tree-ssa-sccvn.cc (copy_reference_ops_from_ref): For addresses
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of zero-sized components do not set ->off if the object size pass
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didn't run.
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For OOB ARRAY_REF accesses in address expressions avoid setting
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->off if the object size pass didn't run.
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(valueize_refs_1): Likewise.
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2024-12-10 Antoni Boucher <bouanto@zoho.com>
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PR target/117923
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* config/aarch64/aarch64-builtins.cc: Remove GTY marker on aarch64_simd_types,
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aarch64_simd_types_trees (new variable), rename aarch64_simd_types to
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aarch64_simd_types_trees.
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* config/aarch64/aarch64-builtins.h: Remove GTY marker on aarch64_simd_types,
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aarch64_simd_types_trees (new variable).
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* config/aarch64/aarch64-sve-builtins-shapes.cc: Rename aarch64_simd_types to
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aarch64_simd_types_trees.
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* config/aarch64/aarch64-sve-builtins.cc: Rename aarch64_simd_types to
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aarch64_simd_types_trees.
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2024-12-09 Mariam Arutunian <mariamarutunian@gmail.com>
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Richard Sandiford <richard.sandiford@arm.com>
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@ -1 +1 @@
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20241210
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20241211
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@ -1,3 +1,15 @@
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2024-12-10 Arsen Arsenović <arsen@aarsen.me>
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Iain Sandoe <iain@sandoe.co.uk>
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* c-pretty-print.cc (c_pretty_printer::storage_class_specifier):
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Check that we're looking at a PARM_DECL or VAR_DECL before
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looking at DECL_REGISTER.
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2024-12-10 Marek Polacek <polacek@redhat.com>
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PR c++/117788
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* c-warn.cc (do_warn_array_compare): Emit a permerror in C++26.
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2024-12-09 Matthew Malcomson <mmalcomson@nvidia.com>
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* c-common.cc (builtin_function_validate_nargs,
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@ -1,3 +1,40 @@
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2024-12-10 Arsen Arsenović <arsen@aarsen.me>
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Iain Sandoe <iain@sandoe.co.uk>
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* coroutines.cc (dump_record_fields): New helper. Iterates a
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RECORD_TYPEs TYPE_FIELDS and pretty-prints them.
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(dmp_str): New. The lang-coro dump stream.
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(coro_dump_id): New. ID of the lang-coro dump.
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(coro_dump_flags): New. Flags passed to the lang-coro dump.
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(coro_maybe_dump_initial_function): New helper. Prints, if
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dumping is enabled, the fndecl passed to it as the original
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function.
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(coro_maybe_dump_ramp): New. Prints the ramp function passed to
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it, if dumping is enabled.
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(coro_maybe_dump_transformed_functions): New.
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(cp_coroutine_transform::apply_transforms): Initialize the
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lang-coro dump. Call coro_maybe_dump_initial_function on the
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original function, as well as coro_maybe_dump_ramp, after the
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transformation into the ramp is finished.
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(cp_coroutine_transform::finish_transforms): Call
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coro_maybe_dump_transformed_functions on the built actor and
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destroy.
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* cp-objcp-common.cc (cp_register_dumps): Register the coroutine
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dump.
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* cp-tree.h (coro_dump_id): Declare as extern.
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* cxx-pretty-print.cc (pp_cxx_template_parameter): Don't call
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TREE_TYPE on a TREE_LIST cell.
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(cxx_pretty_printer::declaration): Handle FIELD_DECL similar to
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VAR_DECL.
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2024-12-10 Marek Polacek <polacek@redhat.com>
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PR c++/117788
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* typeck.cc (cp_build_binary_op) <case EQ_EXPR>: Don't check
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warn_array_compare. Check tf_warning_or_error instead of just
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tf_warning. Maybe return an error_mark_node in C++26.
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<case LE_EXPR>: Likewise.
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2024-12-09 Marek Polacek <polacek@redhat.com>
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Patrick Palka <ppalka@redhat.com>
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@ -1,3 +1,19 @@
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2024-12-10 Gaius Mulley <gaiusmod2@gmail.com>
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PR modula2/117120
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* gm2-compiler/M2CaseList.mod (CaseBoundsResolved): Rewrite.
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(ConvertNulStr2NulChar): New procedure function.
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(NulStr2NulChar): Ditto.
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(GetCaseExpression): Ditto.
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(OverlappingCaseBound): Rewrite.
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* gm2-compiler/M2GCCDeclare.mod (CheckResolveSubrange): Allow
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'' to be used as the subrange low limit.
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* gm2-compiler/M2GenGCC.mod (FoldConvert): Rewrite.
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(PopKindTree): Ditto.
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(BuildHighFromString): Reformat.
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* gm2-compiler/SymbolTable.mod (PushConstString): Add test for
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length 0 and PushChar (nul).
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2024-12-09 Gaius Mulley <gaiusmod2@gmail.com>
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PR modula2/115328
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@ -1,3 +1,334 @@
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2024-12-10 Gaius Mulley <gaiusmod2@gmail.com>
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PR modula2/117120
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* gm2/pim/pass/forloopnulchar.mod: New test.
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* gm2/pim/pass/nulcharcase.mod: New test.
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* gm2/pim/pass/nulcharvar.mod: New test.
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2024-12-10 Vladimir N. Makarov <vmakarov@redhat.com>
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PR rtl-optimization/117946
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* gcc.target/i386/pr117946.c: New.
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2024-12-10 Jerry DeLisle <jvdelisle@gcc.gnu.org>
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PR fortran/117819
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* gfortran.dg/pr117819.f90: New test.
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2024-12-10 Marek Polacek <polacek@redhat.com>
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PR c++/117880
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* g++.dg/warn/Wduplicated-branches8.C: New test.
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2024-12-10 Wilco Dijkstra <wilco.dijkstra@arm.com>
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PR target/117675
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* gcc.target/arm/pr117675.c: Add new test.
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2024-12-10 Wilco Dijkstra <wdijkstr@ip-10-252-53-150.eu-west-1.compute.internal>
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* gcc.target/aarch64/torture/simd-abi-8.c: Update to check for LDP/STP.
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2024-12-10 Marek Polacek <polacek@redhat.com>
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PR c++/117788
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* c-c++-common/Warray-compare-1.c: Expect an error in C++26.
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* c-c++-common/Warray-compare-3.c: Likewise.
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* c-c++-common/Warray-compare-4.c: New test.
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* c-c++-common/Warray-compare-5.c: New test.
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* g++.dg/warn/Warray-compare-1.C: New test.
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2024-12-10 Hans-Peter Nilsson <hp@axis.com>
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|
||||
* gcc.dg/tree-ssa/pr117973-1.c: New test.
|
||||
|
||||
2024-12-10 Jonathan Wakely <jwakely@redhat.com>
|
||||
|
||||
* g++.dg/cpp0x/trivial1.C: Add -Wno-deprecated for C++26.
|
||||
|
||||
2024-12-10 Maciej W. Rozycki <macro@orcam.me.uk>
|
||||
|
||||
* gcc.c-torture/execute/memcpy-a1.c: Mark as expensive.
|
||||
* gcc.c-torture/execute/memcpy-a2.c: Likewise.
|
||||
* gcc.c-torture/execute/memcpy-a4.c: Likewise.
|
||||
* gcc.c-torture/execute/memcpy-a8.c: Likewise.
|
||||
|
||||
2024-12-10 Saurabh Jha <saurabh.jha@arm.com>
|
||||
Richard Sandiford <richard.sandiford@arm.com>
|
||||
|
||||
* gcc.target/aarch64/pragma_cpp_predefs_4.c: Test TARGET_FP8FMA.
|
||||
* gcc.target/aarch64/simd/vmla_fpm.c: New test.
|
||||
* gcc.target/aarch64/simd/vmla_lane_indices_1.c: Likewise.
|
||||
|
||||
2024-12-10 Saurabh Jha <saurabh.jha@arm.com>
|
||||
Richard Sandiford <richard.sandiford@arm.com>
|
||||
|
||||
* gcc.target/aarch64/pragma_cpp_predefs_4.c: Test fp8dot2 and fp8dot4.
|
||||
* gcc.target/aarch64/simd/vdot2_fpm.c: New test.
|
||||
* gcc.target/aarch64/simd/vdot4_fpm.c: New test.
|
||||
* gcc.target/aarch64/simd/vdot_lane_indices_1.c: New test.
|
||||
|
||||
2024-12-10 Saurabh Jha <saurabh.jha@arm.com>
|
||||
Richard Sandiford <richard.sandiford@arm.com>
|
||||
|
||||
* gcc.target/aarch64/acle/fp8.c: Remove check that fp8 feature
|
||||
macro doesn't exist and...
|
||||
* gcc.target/aarch64/pragma_cpp_predefs_4.c: ...test that it does here.
|
||||
* gcc.target/aarch64/simd/scale_fpm.c: New test.
|
||||
* gcc.target/aarch64/simd/vcvt_fpm.c: New test.
|
||||
|
||||
2024-12-10 Richard Biener <rguenther@suse.de>
|
||||
|
||||
PR tree-optimization/117912
|
||||
* c-c++-common/torture/pr117912-1.c: New testcase.
|
||||
* c-c++-common/torture/pr117912-2.c: Likewise.
|
||||
* c-c++-common/torture/pr117912-3.c: Likewise.
|
||||
|
||||
2024-12-10 Hans-Peter Nilsson <hp@axis.com>
|
||||
|
||||
PR tree-optimization/117954
|
||||
* gcc.dg/tree-ssa/pr111456-1.c: Pass
|
||||
--param=logical-op-non-short-circuit=1.
|
||||
|
||||
2024-12-10 Pan Li <pan2.li@intel.com>
|
||||
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i16.c: Take
|
||||
tree-optimized pass for standard name check, and adjust the times.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i8.c: Ditto.
|
||||
|
||||
2024-12-10 Pan Li <pan2.li@intel.com>
|
||||
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i16-to-i8.c: Take
|
||||
tree-optimized pass for standard name check, and adjust the times.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i16-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i16-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i16-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i16-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i16-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i16-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i16-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i8.c: Ditto.
|
||||
|
||||
2024-12-10 Pan Li <pan2.li@intel.com>
|
||||
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s16.c: Take
|
||||
tree-optimized pass for standard name check, and adjust the times.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s8.c: Ditto.
|
||||
|
||||
2024-12-10 Pan Li <pan2.li@intel.com>
|
||||
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u16.c: Take
|
||||
tree-optimized pass for standard name check, and adjust the times.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u8.c: Ditto.
|
||||
|
||||
2024-12-10 Pan Li <pan2.li@intel.com>
|
||||
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-1-u16.c: Take
|
||||
tree-optimized pass for standard name check, and adjust the times.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-1-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-1-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-1-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-10-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-10-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-10-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-10-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-2-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-2-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-2-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-2-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-3-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-3-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-3-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-3-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-4-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-4-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-4-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-4-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-5-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-5-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-5-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-5-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-6-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-6-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-6-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-6-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-7-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-7-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-7-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-7-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-8-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-8-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-8-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-8-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-9-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-9-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-9-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-9-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-1-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-1-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-1-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-1-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-1-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-1-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-1-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_zip.c: Ditto.
|
||||
|
||||
2024-12-10 Pan Li <pan2.li@intel.com>
|
||||
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-1-u16.c: Take
|
||||
tree-optimized pass for standard name check, and adjust the times.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-1-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-1-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-1-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-2-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-2-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-2-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-2-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-3-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-3-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-3-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-3-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-4-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-4-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-4-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-4-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-5-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-5-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-5-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-5-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-6-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-6-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-6-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-6-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-7-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-7-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-7-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-7-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-8-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-8-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-8-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-8-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-1-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-1-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-1-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-1-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-2-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-2-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-2-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-2-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-3-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-3-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-3-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-3-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-4-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-4-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-4-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-4-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-1-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-1-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-1-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-1-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-2-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-2-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-2-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-2-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-3-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-3-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-3-u64.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-3-u8.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-4-u16.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-4-u32.c: Ditto.
|
||||
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-4-u8.c: Ditto.
|
||||
|
||||
2024-12-09 Mariam Arutunian <mariamarutunian@gmail.com>
|
||||
|
||||
* gcc.target/aarch64/crc-builtin-pmul64.c: New test.
|
||||
|
|
|
|||
|
|
@ -1,3 +1,12 @@
|
|||
2024-12-10 Jerry DeLisle <jvdelisle@gcc.gnu.org>
|
||||
|
||||
PR fortran/117819
|
||||
* io/read.c (read_decimal): If the read value is short of the
|
||||
specified width and pad mode is PAD yes, check for BLANK ZERO
|
||||
and adjust the value accordingly.
|
||||
(read_decimal_unsigned): Likewise.
|
||||
(read_radix): Likewise.
|
||||
|
||||
2024-12-04 Jerry DeLisle <jvdelisle@gcc.gnu.org>
|
||||
|
||||
PR fortran/117820
|
||||
|
|
|
|||
|
|
@ -1,3 +1,10 @@
|
|||
2024-12-10 Tobias Burnus <tburnus@baylibre.com>
|
||||
|
||||
* plugin/plugin-gcn.c (GOMP_OFFLOAD_dev2dev, GOMP_OFFLOAD_async_run):
|
||||
Handle omp_async_queue == NULL after call to maybe_init_omp_async.
|
||||
(GOMP_OFFLOAD_openacc_async_construct): Use error not fatal error,
|
||||
partially reverting r15-5392.
|
||||
|
||||
2024-12-06 Thomas Schwinge <tschwinge@baylibre.com>
|
||||
|
||||
* testsuite/libgomp.c/declare-variant-3-sm89.c: New.
|
||||
|
|
|
|||
|
|
@ -1,3 +1,102 @@
|
|||
2024-12-10 Jonathan Wakely <jwakely@redhat.com>
|
||||
|
||||
* include/bits/memory_resource.h (polymoprhic_allocator): Use
|
||||
feature test macro for P0339R6 features.
|
||||
|
||||
2024-12-10 Marek Polacek <polacek@redhat.com>
|
||||
|
||||
PR c++/117788
|
||||
* testsuite/std/ranges/adaptors/conditionally_borrowed.cc: Add a
|
||||
FIXME, adjust.
|
||||
|
||||
2024-12-10 Jonathan Wakely <jwakely@redhat.com>
|
||||
|
||||
* include/bits/stl_uninitialized.h (__is_bitwise_relocatable):
|
||||
Revert to depending on is_trivial.
|
||||
|
||||
2024-12-10 Giuseppe D'Angelo <giuseppe.dangelo@kdab.com>
|
||||
|
||||
* include/std/type_traits: Deprecate is_trivial and
|
||||
is_trivial_v.
|
||||
* include/experimental/type_traits: Suppress the deprecation
|
||||
warning.
|
||||
* testsuite/20_util/is_trivial/requirements/explicit_instantiation.cc:
|
||||
Amend the test to suppress the deprecation warning.
|
||||
* testsuite/20_util/is_trivial/requirements/typedefs.cc:
|
||||
Likewise.
|
||||
* testsuite/20_util/is_trivial/value.cc: Likewise.
|
||||
* testsuite/20_util/variable_templates_for_traits.cc: Likewise.
|
||||
* testsuite/experimental/type_traits/value.cc: Likewise.
|
||||
* testsuite/18_support/max_align_t/requirements/2.cc: Update the
|
||||
test with P3247R2's new wording.
|
||||
|
||||
2024-12-10 Giuseppe D'Angelo <giuseppe.dangelo@kdab.com>
|
||||
|
||||
* testsuite/20_util/specialized_algorithms/uninitialized_copy/102064.cc:
|
||||
Port away from is_trivial.
|
||||
* testsuite/20_util/specialized_algorithms/uninitialized_copy_n/102064.cc:
|
||||
Likewise.
|
||||
* testsuite/20_util/specialized_algorithms/uninitialized_default/94540.cc:
|
||||
Likewise.
|
||||
* testsuite/20_util/specialized_algorithms/uninitialized_default_n/94540.cc:
|
||||
Likewise.
|
||||
* testsuite/20_util/specialized_algorithms/uninitialized_fill/102064.cc:
|
||||
Likewise.
|
||||
* testsuite/20_util/specialized_algorithms/uninitialized_fill_n/102064.cc:
|
||||
Likewise.
|
||||
* testsuite/20_util/specialized_algorithms/uninitialized_value_construct/94540.cc:
|
||||
Likewise.
|
||||
* testsuite/20_util/specialized_algorithms/uninitialized_value_construct_n/94540.cc:
|
||||
Likewise.
|
||||
* testsuite/23_containers/vector/cons/94540.cc: Likewise.
|
||||
* testsuite/25_algorithms/copy/move_iterators/69478.cc:
|
||||
Likewise.
|
||||
* testsuite/25_algorithms/copy_backward/move_iterators/69478.cc:
|
||||
Likewise.
|
||||
* testsuite/25_algorithms/move/69478.cc: Likewise.
|
||||
* testsuite/25_algorithms/move_backward/69478.cc: Likewise.
|
||||
* testsuite/25_algorithms/rotate/constrained.cc: Likewise.
|
||||
* testsuite/25_algorithms/rotate_copy/constrained.cc: Likewise.
|
||||
|
||||
2024-12-10 Giuseppe D'Angelo <giuseppe.dangelo@kdab.com>
|
||||
|
||||
* include/bits/ranges_uninitialized.h: port some if
|
||||
constexpr away from is_trivial, and towards more specific
|
||||
detections instead.
|
||||
|
||||
2024-12-10 Giuseppe D'Angelo <giuseppe.dangelo@kdab.com>
|
||||
|
||||
* include/bits/stl_uninitialized.h: Amended the
|
||||
__is_bitwise_relocatable type trait.
|
||||
|
||||
2024-12-10 Giuseppe D'Angelo <giuseppe.dangelo@kdab.com>
|
||||
|
||||
* include/pstl/algorithm_impl.h (__remove_elements): Port away
|
||||
from is_trivial.
|
||||
(__pattern_inplace_merge): Likewise.
|
||||
* include/pstl/glue_memory_impl.h (uninitialized_copy): Likewise.
|
||||
(uninitialized_copy_n): Likewise.
|
||||
(uninitialized_move): Likewise.
|
||||
(uninitialized_move_n): Likewise.
|
||||
(uninitialized_default_construct): Likewise.
|
||||
(uninitialized_default_construct_n): Likewise.
|
||||
(uninitialized_value_construct): Likewise.
|
||||
(uninitialized_value_construct_n): Likewise.
|
||||
* testsuite/20_util/specialized_algorithms/pstl/uninitialized_construct.cc:
|
||||
Likewise.
|
||||
* testsuite/20_util/specialized_algorithms/pstl/uninitialized_copy_move.cc:
|
||||
Likewise.
|
||||
* testsuite/20_util/specialized_algorithms/pstl/uninitialized_fill_destroy.cc:
|
||||
Likewise.
|
||||
* testsuite/25_algorithms/pstl/alg_modifying_operations/partition.cc:
|
||||
Likewise.
|
||||
|
||||
2024-12-10 Giuseppe D'Angelo <giuseppe.dangelo@kdab.com>
|
||||
|
||||
* include/bits/basic_string.h: Add a static_assert on the
|
||||
char-like type.
|
||||
* include/std/string_view: Port away from is_trivial.
|
||||
|
||||
2024-12-09 Jonathan Wakely <jwakely@redhat.com>
|
||||
|
||||
PR libstdc++/102259
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue