sync.md (load_locked_<mode>): Use Z for memory_operand constraint.
* config/rs6000/sync.md (load_locked_<mode>): Use Z for memory_operand constraint. (store_conditional_<mode>): Same. (sync_compare_and_swap<mode>): Same. (sync_lock_test_and_set<mode>): Same. From-SVN: r101813
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2 changed files with 12 additions and 4 deletions
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@ -1,3 +1,11 @@
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2005-07-08 David Edelsohn <edelsohn@gnu.org>
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* config/rs6000/sync.md (load_locked_<mode>): Use Z for
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memory_operand constraint.
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(store_conditional_<mode>): Same.
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(sync_compare_and_swap<mode>): Same.
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(sync_lock_test_and_set<mode>): Same.
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2005-07-08 Hans-Peter Nilsson <hp@axis.com>
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Rewrite PIC support to more closely model actual instructions.
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@ -41,7 +41,7 @@
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(define_insn "load_locked_<mode>"
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[(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
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(unspec_volatile:GPR
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[(match_operand:GPR 1 "memory_operand" "m")] UNSPECV_LL))]
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[(match_operand:GPR 1 "memory_operand" "Z")] UNSPECV_LL))]
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"TARGET_POWERPC"
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"<larx> %0,%y1"
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[(set_attr "type" "load_l")])
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@ -49,7 +49,7 @@
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(define_insn "store_conditional_<mode>"
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[(set (match_operand:CC 0 "cc_reg_operand" "=x")
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(unspec_volatile:CC [(const_int 0)] UNSPECV_SC))
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(set (match_operand:GPR 1 "memory_operand" "=m")
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(set (match_operand:GPR 1 "memory_operand" "=Z")
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(match_operand:GPR 2 "gpc_reg_operand" "r"))]
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"TARGET_POWERPC"
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"<stcx> %2,%y1"
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@ -57,7 +57,7 @@
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(define_insn_and_split "sync_compare_and_swap<mode>"
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[(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
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(match_operand:GPR 1 "memory_operand" "+m"))
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(match_operand:GPR 1 "memory_operand" "+Z"))
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(set (match_dup 1)
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(unspec_volatile:GPR
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[(match_operand:GPR 2 "reg_or_short_operand" "rI")
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@ -77,7 +77,7 @@
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(define_insn_and_split "sync_lock_test_and_set<mode>"
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[(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
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(match_operand:GPR 1 "memory_operand" "+m"))
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(match_operand:GPR 1 "memory_operand" "+Z"))
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(set (match_dup 1)
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(unspec_volatile:GPR
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[(match_operand:GPR 2 "reg_or_short_operand" "rL")]
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