From d54c47e1b5334835cf39591618991d34f51ce8c0 Mon Sep 17 00:00:00 2001 From: David Edelsohn Date: Sat, 9 Jul 2005 01:13:03 +0000 Subject: [PATCH] sync.md (load_locked_): Use Z for memory_operand constraint. * config/rs6000/sync.md (load_locked_): Use Z for memory_operand constraint. (store_conditional_): Same. (sync_compare_and_swap): Same. (sync_lock_test_and_set): Same. From-SVN: r101813 --- gcc/ChangeLog | 8 ++++++++ gcc/config/rs6000/sync.md | 8 ++++---- 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6c5e2bb54e3..ed5f975e44f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2005-07-08 David Edelsohn + + * config/rs6000/sync.md (load_locked_): Use Z for + memory_operand constraint. + (store_conditional_): Same. + (sync_compare_and_swap): Same. + (sync_lock_test_and_set): Same. + 2005-07-08 Hans-Peter Nilsson Rewrite PIC support to more closely model actual instructions. diff --git a/gcc/config/rs6000/sync.md b/gcc/config/rs6000/sync.md index a98dc1545d3..cef64787b14 100644 --- a/gcc/config/rs6000/sync.md +++ b/gcc/config/rs6000/sync.md @@ -41,7 +41,7 @@ (define_insn "load_locked_" [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") (unspec_volatile:GPR - [(match_operand:GPR 1 "memory_operand" "m")] UNSPECV_LL))] + [(match_operand:GPR 1 "memory_operand" "Z")] UNSPECV_LL))] "TARGET_POWERPC" " %0,%y1" [(set_attr "type" "load_l")]) @@ -49,7 +49,7 @@ (define_insn "store_conditional_" [(set (match_operand:CC 0 "cc_reg_operand" "=x") (unspec_volatile:CC [(const_int 0)] UNSPECV_SC)) - (set (match_operand:GPR 1 "memory_operand" "=m") + (set (match_operand:GPR 1 "memory_operand" "=Z") (match_operand:GPR 2 "gpc_reg_operand" "r"))] "TARGET_POWERPC" " %2,%y1" @@ -57,7 +57,7 @@ (define_insn_and_split "sync_compare_and_swap" [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r") - (match_operand:GPR 1 "memory_operand" "+m")) + (match_operand:GPR 1 "memory_operand" "+Z")) (set (match_dup 1) (unspec_volatile:GPR [(match_operand:GPR 2 "reg_or_short_operand" "rI") @@ -77,7 +77,7 @@ (define_insn_and_split "sync_lock_test_and_set" [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r") - (match_operand:GPR 1 "memory_operand" "+m")) + (match_operand:GPR 1 "memory_operand" "+Z")) (set (match_dup 1) (unspec_volatile:GPR [(match_operand:GPR 2 "reg_or_short_operand" "rL")]