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[ARM/AArch64] PR 68088: Fix RTL checking ICE due to subregs inside accumulator forwarding check

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PR target/68088
        * config/arm/aarch-common.c (aarch_accumulator_forwarding): Strip
        subregs from accumulator and make sure it's a register.

        * gcc.dg/pr68088_1.c: New test.

From-SVN: r229845
This commit is contained in:
Kyrylo Tkachov 2015-11-06 12:04:15 +00:00 • committed by Kyrylo Tkachov
parent 66c5c67baf
commit c9aa6b940f
4 changed files with 32 additions and 0 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2015-11-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/68088
* config/arm/aarch-common.c (aarch_accumulator_forwarding): Strip
subregs from accumulator and make sure it's a register.
2015-11-06 Simon Dardis <simon.dardis@imgtec.com>
* config/mips/loongson.md (vec_loongson_extract_lo_<mode>): New, extract

6
gcc/config/arm/aarch-common.c
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@ -460,6 +460,12 @@ aarch_accumulator_forwarding (rtx_insn *producer, rtx_insn *consumer)
return 0;
}
if (GET_CODE (accumulator) == SUBREG)
accumulator = SUBREG_REG (accumulator);
if (!REG_P (accumulator))
return 0;
return (REGNO (dest) == REGNO (accumulator));
}

5
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2015-11-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/68088
* gcc.dg/pr68088_1.c: New test.
2015-11-06 Richard Biener <rguenther@suse.de>
* gcc.dg/vect/bb-slp-38.c: New testcase.

15
gcc/testsuite/gcc.dg/pr68088_1.c Normal file
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@ -0,0 +1,15 @@
/* { dg-do compile } */
/* { dg-options "-O2" } */
void bar (unsigned long);
void
foo (unsigned long aul, unsigned m, unsigned i)
{
while (1)
{
aul += i;
i = aul % m;
bar (aul);
}
}