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RISC-V: Enable pressure-aware scheduling by default.

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this patch enables pressure-aware scheduling for riscv.  There have been
various requests for it so I figured I'd just go ahead and send
the patch.

There is some slight regression in code quality for a number of
vector tests where we spill more due to different instructions order.
The ones I looked at were a mix of bad luck and/or brittle tests.
Comparing the size of the generated assembly or the number of vsetvls
for SPECint also didn't show any immediate benefit but that's obviously
not a very fine-grained analysis.

As cost and scheduling models mature I expect the situation to improve
and for now I think it's generally favorable to enable pressure-aware
scheduling so we can work with it rather than trying to find every
possible problem in advance.

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc: Add -fsched-pressure.
	* config/riscv/riscv.cc (riscv_option_override): Set sched
	pressure algorithm.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/narrow_constraint-1.c: Add
	-fno-sched-pressure.
	* gcc.target/riscv/rvv/base/narrow_constraint-17.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-18.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-19.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-20.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-21.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-22.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-23.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-24.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-25.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-26.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-27.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-28.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-29.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-30.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-31.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-4.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-5.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-8.c: Ditto.
	* gcc.target/riscv/rvv/base/narrow_constraint-9.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c: Ditto.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c: Ditto.
This commit is contained in:
Robin Dapp 2023-08-18 15:57:16 +02:00 • committed by Robin Dapp
parent b6ba0cc933
commit a047513c92
27 changed files with 32 additions and 25 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
gcc/common/config/riscv/riscv-common.cc
View file

@ -2016,6 +2016,8 @@ riscv_get_valid_option_values (int option_code,
static const struct default_options riscv_option_optimization_table[] =
{
{ OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 },
/* Enable -fsched-pressure starting at -O1. */
{ OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 },
{ OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 },
#if TARGET_DEFAULT_ASYNC_UNWIND_TABLES == 1
{ OPT_LEVELS_ALL, OPT_fasynchronous_unwind_tables, NULL, 1 },

5
gcc/config/riscv/riscv.cc
View file

@ -65,6 +65,7 @@ along with GCC; see the file COPYING3. If not see
#include "cfgloop.h"
#include "cfgrtl.h"
#include "sel-sched.h"
#include "sched-int.h"
#include "fold-const.h"
#include "gimple-iterator.h"
#include "gimple-expr.h"
@ -7096,6 +7097,10 @@ riscv_option_override (void)
sorry (
"Current RISC-V GCC cannot support VLEN greater than 4096bit for 'V' Extension");
SET_OPTION_IF_UNSET (&global_options, &global_options_set,
param_sched_pressure_algorithm,
SCHED_PRESSURE_MODEL);
/* Convert -march to a chunks count. */
riscv_vector_chunks = riscv_convert_vector_bits ();
}

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-1.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-17.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-18.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-19.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-20.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-21.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-22.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-23.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-24.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-25.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-26.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-27.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-28.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-29.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-30.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-31.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-4.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-5.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-8.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/base/narrow_constraint-9.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-sched-pressure" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-sched-pressure -fno-tree-vectorize" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-sched-pressure -fno-tree-vectorize" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-sched-pressure -fno-tree-vectorize" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-sched-pressure -fno-tree-vectorize" } */
#include "riscv_vector.h"

2
gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c
View file

@ -1,5 +1,5 @@
/* { dg-do compile } */
/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-sched-pressure -fno-tree-vectorize" } */
#include "riscv_vector.h"