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RISC-V: Allow const 17-31 for vector shift.

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This patch adds a missing constraint in order to be able to print (and
not ICE) vector immediates 17-31 for vector shifts.

Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/binop/shift-immediate.c: New test.
This commit is contained in:
Robin Dapp 2023-08-18 16:16:54 +02:00
parent e7aec3ae38
commit b6ba0cc933
2 changed files with 18 additions and 1 deletions
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3
gcc/config/riscv/riscv.cc
View file

@ -4954,7 +4954,8 @@ riscv_print_operand (FILE *file, rtx op, int letter)
else if (satisfies_constraint_Wc0 (op))
asm_fprintf (file, "0");
else if (satisfies_constraint_vi (op)
|| satisfies_constraint_vj (op))
|| satisfies_constraint_vj (op)
|| satisfies_constraint_vk (op))
asm_fprintf (file, "%wd", INTVAL (elt));
else
output_operand_lossage ("invalid vector constant");

16
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-immediate.c Normal file
View file

@ -0,0 +1,16 @@
/* { dg-do compile } */
/* { dg-additional-options "-std=c99 -march=rv32gcv -mabi=ilp32d -O2 --param=riscv-autovec-preference=scalable" } */
#define uint8_t unsigned char
void foo1 (uint8_t *a)
{
uint8_t b = a[0];
int val = 0;
for (int i = 0; i < 4; i++)
{
a[i] = (val & 1) ? (-val) >> 17 : val;
val += b;
}
}