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re PR target/34900 (target mips64vrel-elf. Internal compiler error (in reload_cse_simplify_operands, at postreload.c:392) while building libiberty)

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gcc/
	PR target/34900
	* config/mips/mips.c (gen_load_const_gp): New function, taking a
	comment from...
	(mips16_gp_pseudo_reg): ...here.
	* config/mips/mips.md (load_const_gp): Replace with...
	(load_const_gp_<mode>): ...this :P-based insn.

From-SVN: r131983
This commit is contained in:
Richard Sandiford 2008-01-31 19:28:03 +00:00 • committed by Richard Sandiford
parent 28dac70a08
commit 5ca3d30cfb
3 changed files with 24 additions and 5 deletions
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9
gcc/ChangeLog
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@ -1,3 +1,12 @@
2008-01-31 Richard Sandiford <rsandifo@nildram.co.uk>
PR target/34900
* config/mips/mips.c (gen_load_const_gp): New function, taking a
comment from...
(mips16_gp_pseudo_reg): ...here.
* config/mips/mips.md (load_const_gp): Replace with...
(load_const_gp_<mode>): ...this :P-based insn.
2008-01-31 Manuel Lopez-Ibanez <manu@gcc.gnu.org>
* doc/invoke.texi (-ansi): Mention explicitly corresponding -std=

14
gcc/config/mips/mips.c
View file

@ -2161,6 +2161,18 @@ mips_emit_call_insn (rtx pattern, bool lazy_p)
return insn;
}
/* Return an instruction that copies $gp into register REG. We want
GCC to treat the register's value as constant, so that its value
can be rematerialized on demand. */
static rtx
gen_load_const_gp (rtx reg)
{
return (Pmode == SImode
? gen_load_const_gp_si (reg)
: gen_load_const_gp_di (reg));
}
/* Return a pseudo register that contains the value of $gp throughout
the current function. Such registers are needed by MIPS16 functions,
for which $gp itself is not a valid base register or addition operand. */
@ -2179,8 +2191,6 @@ mips16_gp_pseudo_reg (void)
{
rtx insn, scan, after;
/* We want GCC to treat the register's value as constant, so that
it can be rematerialized on demand. */
insn = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx);
push_topmost_sequence ();

6
gcc/config/mips/mips.md
View file

@ -4265,9 +4265,9 @@
(set_attr "mode" "<HALFMODE>")])
;; Move a constant that satisfies CONST_GP_P into operand 0.
(define_expand "load_const_gp"
[(set (match_operand 0 "register_operand" "=d")
(const (unspec [(const_int 0)] UNSPEC_GP)))])
(define_expand "load_const_gp_<mode>"
[(set (match_operand:P 0 "register_operand" "=d")
(const:P (unspec:P [(const_int 0)] UNSPEC_GP)))])
;; Insn to initialize $gp for n32/n64 abicalls. Operand 0 is the offset
;; of _gp from the start of this function. Operand 1 is the incoming