From 5ca3d30cfb7596bbdabf9e644db03526958ba821 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Thu, 31 Jan 2008 19:28:03 +0000 Subject: [PATCH] re PR target/34900 (target mips64vrel-elf. Internal compiler error (in reload_cse_simplify_operands, at postreload.c:392) while building libiberty) gcc/ PR target/34900 * config/mips/mips.c (gen_load_const_gp): New function, taking a comment from... (mips16_gp_pseudo_reg): ...here. * config/mips/mips.md (load_const_gp): Replace with... (load_const_gp_): ...this :P-based insn. From-SVN: r131983 --- gcc/ChangeLog | 9 +++++++++ gcc/config/mips/mips.c | 14 ++++++++++++-- gcc/config/mips/mips.md | 6 +++--- 3 files changed, 24 insertions(+), 5 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 768dacd3898..007d67b5f0e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2008-01-31 Richard Sandiford + + PR target/34900 + * config/mips/mips.c (gen_load_const_gp): New function, taking a + comment from... + (mips16_gp_pseudo_reg): ...here. + * config/mips/mips.md (load_const_gp): Replace with... + (load_const_gp_): ...this :P-based insn. + 2008-01-31 Manuel Lopez-Ibanez * doc/invoke.texi (-ansi): Mention explicitly corresponding -std= diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index c2d4765efb6..da8b4aa4c96 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -2161,6 +2161,18 @@ mips_emit_call_insn (rtx pattern, bool lazy_p) return insn; } +/* Return an instruction that copies $gp into register REG. We want + GCC to treat the register's value as constant, so that its value + can be rematerialized on demand. */ + +static rtx +gen_load_const_gp (rtx reg) +{ + return (Pmode == SImode + ? gen_load_const_gp_si (reg) + : gen_load_const_gp_di (reg)); +} + /* Return a pseudo register that contains the value of $gp throughout the current function. Such registers are needed by MIPS16 functions, for which $gp itself is not a valid base register or addition operand. */ @@ -2179,8 +2191,6 @@ mips16_gp_pseudo_reg (void) { rtx insn, scan, after; - /* We want GCC to treat the register's value as constant, so that - it can be rematerialized on demand. */ insn = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx); push_topmost_sequence (); diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 8b7e612f386..a6ddb8c967f 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -4265,9 +4265,9 @@ (set_attr "mode" "")]) ;; Move a constant that satisfies CONST_GP_P into operand 0. -(define_expand "load_const_gp" - [(set (match_operand 0 "register_operand" "=d") - (const (unspec [(const_int 0)] UNSPEC_GP)))]) +(define_expand "load_const_gp_" + [(set (match_operand:P 0 "register_operand" "=d") + (const:P (unspec:P [(const_int 0)] UNSPEC_GP)))]) ;; Insn to initialize $gp for n32/n64 abicalls. Operand 0 is the offset ;; of _gp from the start of this function. Operand 1 is the incoming