alias.c, [...]: Fix comment typos.
* alias.c, crtstuff.c, dbxout.c, domwalk.c, domwalk.h, gcc.c, gcse.c, global.c, lambda-code.c, loop.c, mips-tdump.c, optabs.h, predict.c, reg-stack.c, regclass.c, sched-rgn.c, tree-optimize.c, tree-ssa-dom.c, tree-ssa-forwprop.c, tree-ssa-operands.c, tree-ssa-phiopt.c, tree-ssa-threadupdate.c: Fix comment typos. From-SVN: r87707
This commit is contained in:
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112cdef5e6
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23 changed files with 41 additions and 32 deletions
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@ -1,3 +1,12 @@
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2004-09-18 Kazu Hirata <kazu@cs.umass.edu>
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* alias.c, crtstuff.c, dbxout.c, domwalk.c, domwalk.h, gcc.c,
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gcse.c, global.c, lambda-code.c, loop.c, mips-tdump.c,
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optabs.h, predict.c, reg-stack.c, regclass.c, sched-rgn.c,
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tree-optimize.c, tree-ssa-dom.c, tree-ssa-forwprop.c,
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tree-ssa-operands.c, tree-ssa-phiopt.c,
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tree-ssa-threadupdate.c: Fix comment typos.
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2004-09-18 Kazu Hirata <kazu@cs.umass.edu>
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* config/darwin-c.c, config/arc/arc.c, config/arc/arc.md,
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@ -2698,7 +2698,7 @@ memory_modified_1 (rtx x, rtx pat ATTRIBUTE_UNUSED, void *data)
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/* Return true when INSN possibly modify memory contents of MEM
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(ie address can be modified). */
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(i.e. address can be modified). */
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bool
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memory_modified_in_insn_p (rtx mem, rtx insn)
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{
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@ -109,7 +109,7 @@ call_ ## FUNC (void) \
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but not its definition.
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Making TARGET_WEAK_ATTRIBUTE conditional seems like a good solution until
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one thinks about scaling to larger problems -- ie, the condition under
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one thinks about scaling to larger problems -- i.e., the condition under
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which TARGET_WEAK_ATTRIBUTE is active will eventually get far too
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complicated.
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@ -1431,7 +1431,7 @@ dbxout_type (tree type, int full)
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{
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case VOID_TYPE:
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case LANG_TYPE:
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/* For a void type, just define it as itself; ie, "5=5".
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/* For a void type, just define it as itself; i.e., "5=5".
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This makes us consider it defined
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without saying what it is. The debugger will make it
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a void type when the reference is seen, and nothing will
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@ -52,7 +52,7 @@ Boston, MA 02111-1307, USA. */
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[ Note this walker can also walk the post-dominator tree, which is
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defined in a similar manner. ie, block B1 is said to post-dominate
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defined in a similar manner. i.e., block B1 is said to post-dominate
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block B2 if all paths from B2 to the exit block must pass through
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B1. ]
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@ -25,7 +25,7 @@ Boston, MA 02111-1307, USA. */
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struct dom_walk_data
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{
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/* This is the direction of the dominator tree we want to walk. ie,
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/* This is the direction of the dominator tree we want to walk. i.e.,
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if it is set to CDI_DOMINATORS, then we walk the dominator tree,
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if it is set to CDI_POST_DOMINATORS, then we walk the post
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dominator tree. */
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@ -5169,7 +5169,7 @@ do_spec_1 (const char *spec, int inswitch, const char *soft_matched_part)
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}
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else
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/* Catch the case where a spec string contains something like
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'%{foo:%*}'. ie there is no * in the pattern on the left
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'%{foo:%*}'. i.e. there is no * in the pattern on the left
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hand side of the :. */
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error ("spec failure: '%%*' has not been initialized by pattern match");
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break;
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@ -453,7 +453,7 @@ static int reg_set_table_size;
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/* This is a list of expressions which are MEMs and will be used by load
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or store motion.
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Load motion tracks MEMs which aren't killed by
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anything except itself. (ie, loads and stores to a single location).
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anything except itself. (i.e., loads and stores to a single location).
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We can then allow movement of these MEM refs with a little special
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allowance. (all stores copy the same value to the reaching reg used
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for the loads). This means all values used to store into memory must have
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@ -2768,7 +2768,7 @@ find_avail_set (int regno, rtx insn)
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struct expr *set1 = 0;
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/* Loops are not possible here. To get a loop we would need two sets
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available at the start of the block containing INSN. ie we would
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available at the start of the block containing INSN. i.e. we would
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need two sets like this available at the start of the block:
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(set (reg X) (reg Y))
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if (! REG_P (src))
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break;
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/* Follow the copy chain, ie start another iteration of the loop
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/* Follow the copy chain, i.e. start another iteration of the loop
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and see if we have an available copy into SRC. */
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regno = REGNO (src);
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}
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@ -734,7 +734,7 @@ global_conflicts (void)
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evaluates X.
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3. Either X or Y is not evaluated on the path to P
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(ie it is used uninitialized) and thus the
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(i.e. it is used uninitialized) and thus the
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conflict can be ignored.
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In cases #1 and #2 the conflict will be recorded when we
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@ -2033,7 +2033,7 @@ stmt_is_bumper_for_loop (struct loop *loop, tree stmt)
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innermost loop body.
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If S is a program statement, then
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ie
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i.e.
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DO I = 1, 20
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S1
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DO J = 1, 20
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@ -2395,7 +2395,7 @@ perfect_nestify (struct loops *loops,
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matrix T is legal when applied to a loop nest with a set of
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lexicographically non-negative distance vectors RDG if and only if
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for each vector d in RDG, (T.d >= 0) is lexicographically positive.
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ie.: if and only if it transforms the lexicographically positive
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i.e.: if and only if it transforms the lexicographically positive
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distance vectors to lexicographically positive vectors. Note that
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a unimodular matrix must transform the zero vector (and only it) to
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the zero vector." S.Muchnick. */
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@ -3558,7 +3558,7 @@ note_addr_stored (rtx x, rtx y ATTRIBUTE_UNUSED,
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}
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/* X is a value modified by an INSN that references a biv inside a loop
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exit test (ie, X is somehow related to the value of the biv). If X
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exit test (i.e., X is somehow related to the value of the biv). If X
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is a pseudo that is used more than once, then the biv is (effectively)
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used more than once. DATA is a pointer to a loop_regs structure. */
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@ -631,7 +631,7 @@ type_to_string (AUXU *aux_ptr, int index, FDR *fdp)
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/*
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* Snarf up any array bounds in the correct order. Arrays
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* store 5 successive words in the aux. table:
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* word 0 RNDXR to type of the bounds (ie, int)
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* word 0 RNDXR to type of the bounds (i.e., int)
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* word 1 Current file descriptor index
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* word 2 low bound
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* word 3 high bound (or -1 if [])
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int first_array = i;
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int j;
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/* Print array bounds reversed (ie, in the order the C
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/* Print array bounds reversed (i.e., in the order the C
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programmer writes them). C is such a fun language.... */
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while (i < 5 && qualifiers[i+1].type == tq_Array)
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@ -374,12 +374,12 @@ extern GTY(()) optab code_to_optab[NUM_RTX_CODE + 1];
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typedef rtx (*rtxfun) (rtx);
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/* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
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/* Indexed by the rtx-code for a conditional (e.g. EQ, LT,...)
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gives the gen_function to make a branch to test that condition. */
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extern rtxfun bcc_gen_fctn[NUM_RTX_CODE];
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/* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
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/* Indexed by the rtx-code for a conditional (e.g. EQ, LT,...)
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gives the insn code to make a store-condition insn
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to test that condition. */
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@ -823,7 +823,7 @@ estimate_probability (struct loops *loops_info)
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&& !last_basic_block_p (e->dest))
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predict_edge_def (e, PRED_EARLY_RETURN, TAKEN);
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/* Look for block we are guarding (ie we dominate it,
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/* Look for block we are guarding (i.e. we dominate it,
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but it doesn't postdominate us). */
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if (e->dest != EXIT_BLOCK_PTR && e->dest != bb
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&& dominated_by_p (CDI_DOMINATORS, e->dest, e->src)
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&& !last_basic_block_p (e->dest))
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predict_edge_def (e, PRED_EARLY_RETURN, TAKEN);
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/* Look for block we are guarding (ie we dominate it,
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/* Look for block we are guarding (i.e. we dominate it,
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but it doesn't postdominate us). */
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if (e->dest != EXIT_BLOCK_PTR && e->dest != bb
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&& dominated_by_p (CDI_DOMINATORS, e->dest, e->src)
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@ -105,7 +105,7 @@
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asm ("foo" : "=t" (a) : "f" (b));
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This asm says that input B is not popped by the asm, and that
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the asm pushes a result onto the reg-stack, ie, the stack is one
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the asm pushes a result onto the reg-stack, i.e., the stack is one
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deeper after the asm than it was before. But, it is possible that
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reload will think that it can use the same reg for both the input and
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the output, if input B dies in this insn.
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Insert any needed insns before or after INSN, as indicated by
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WHERE. OLD is the original stack layout, and NEW is the desired
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form. OLD is updated to reflect the code emitted, ie, it will be
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form. OLD is updated to reflect the code emitted, i.e., it will be
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the same as NEW upon return.
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This function will not preserve block_end[]. But that information
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@ -1582,7 +1582,7 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops,
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win = address_operand (op, GET_MODE (op));
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/* We know this operand is an address, so we want it to be
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allocated to a register that can be the base of an
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address, ie BASE_REG_CLASS. */
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address, i.e. BASE_REG_CLASS. */
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classes[i]
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= reg_class_subunion[(int) classes[i]]
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[(int) MODE_BASE_REG_CLASS (VOIDmode)];
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win = 1;
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/* We know this operand is an address, so we want it to
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be allocated to a register that can be the base of an
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address, ie BASE_REG_CLASS. */
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address, i.e. BASE_REG_CLASS. */
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classes[i]
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= reg_class_subunion[(int) classes[i]]
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[(int) MODE_BASE_REG_CLASS (VOIDmode)];
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@ -912,7 +912,7 @@ find_rgns (struct edge_list *edge_list)
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d b
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The algorithm in the DFS traversal may not mark B & D as part
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of the loop (ie they will not have max_hdr set to A).
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of the loop (i.e. they will not have max_hdr set to A).
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We know they can not be loop latches (else they would have
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had max_hdr set since they'd have a backedge to a dominator
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@ -541,7 +541,7 @@ execute_pass_list (struct tree_opt_pass *pass)
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}
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/* update recursivly all inlined_to pointers of functions
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/* Update recursively all inlined_to pointers of functions
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inlined into NODE to INLINED_TO. */
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static void
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update_inlined_to_pointers (struct cgraph_node *node,
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@ -170,7 +170,7 @@ struct opt_stats_d
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optimizations are not performed.
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Note carefully we do not propagate information through each statement
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in the block. ie, if we know variable X has a value defined of
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in the block. i.e., if we know variable X has a value defined of
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[0, 25] and we encounter Y = X + 1, we do not track a value range
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for Y (which would be [1, 26] if we cared). Similarly we do not
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constrain values as we encounter narrowing typecasts, etc. */
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/* We really want to avoid unnecessary computations of range
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info. So all ranges are computed lazily; this avoids a
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lot of unnecessary work. ie, we record the conditional,
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lot of unnecessary work. i.e., we record the conditional,
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but do not process how it constrains the variable's
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potential values until we know that processing the condition
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could be helpful.
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tree op1 = TREE_OPERAND (cond, 1);
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/* Special case comparing booleans against a constant as we know
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the value of OP0 on both arms of the branch. ie, we can record
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the value of OP0 on both arms of the branch. i.e., we can record
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an equivalence for OP0 rather than COND. */
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if ((TREE_CODE (cond) == EQ_EXPR || TREE_CODE (cond) == NE_EXPR)
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&& TREE_CODE (op0) == SSA_NAME
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@ -39,7 +39,7 @@ Boston, MA 02111-1307, USA. */
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Right now we only bother forward propagating into COND_EXPRs since those
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are relatively common cases where forward propagation creates valid
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gimple code without the expression needing to fold. ie
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gimple code without the expression needing to fold. i.e.
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bb0:
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x = a COND b;
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@ -75,7 +75,7 @@ Boston, MA 02111-1307, USA. */
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variable, and that same variable occurs in the same operands cache, then
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the new cache vector will also get the same SSA_NAME.
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ie, if a stmt had a VUSE of 'a_5', and 'a' occurs in the new operand
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i.e., if a stmt had a VUSE of 'a_5', and 'a' occurs in the new operand
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vector for VUSE, then the new vector will also be modified such that
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it contains 'a_5' rather than 'a'.
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@ -47,7 +47,7 @@ static bool candidate_bb_for_phi_optimization (basic_block,
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basic_block *);
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/* This pass eliminates PHI nodes which can be trivially implemented as
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an assignment from a conditional expression. ie if we have something
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an assignment from a conditional expression. i.e. if we have something
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like:
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bb0:
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@ -41,7 +41,7 @@ Boston, MA 02111-1307, USA. */
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one or more in-edges to B to instead reach the destination of an
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out-edge from B while preserving any side effects in B.
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ie, given A->B and B->C, change A->B to be A->C yet still preserve the
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i.e., given A->B and B->C, change A->B to be A->C yet still preserve the
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side effects of executing B.
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1. Make a copy of B (including its outgoing edges and statements). Call
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