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AArch64: use movi d0, #0 to clear SVE registers instead of mov z0.d, #0

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This patch changes SVE to use Adv. SIMD movi 0 to clear SVE registers when not
in SVE streaming mode.  As the Neoverse Software Optimization guides indicate
SVE mov #0 is not a zero cost move.

When In streaming mode we continue to use SVE's mov to clear the registers.

Tests have already been updated.

gcc/ChangeLog:

	* config/aarch64/aarch64.cc (aarch64_output_sve_mov_immediate): Use
	fmov for SVE zeros.
This commit is contained in:
Tamar Christina 2024-10-18 09:44:15 +01:00
parent 87dc6b1992
commit 453d3d90c3
1 changed files with 5 additions and 2 deletions
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7
gcc/config/aarch64/aarch64.cc
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@ -25516,8 +25516,11 @@ aarch64_output_sve_mov_immediate (rtx const_vector)
}
}
snprintf (templ, sizeof (templ), "mov\t%%0.%c, #" HOST_WIDE_INT_PRINT_DEC,
element_char, INTVAL (info.u.mov.value));
if (info.u.mov.value == const0_rtx && TARGET_NON_STREAMING)
snprintf (templ, sizeof (templ), "movi\t%%d0, #0");
else
snprintf (templ, sizeof (templ), "mov\t%%0.%c, #" HOST_WIDE_INT_PRINT_DEC,
element_char, INTVAL (info.u.mov.value));
return templ;
}