procyberian/gcc
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

h8300.md (mulqihi3): Tighten predicates to register_operand.

Browse source 
* config/h8300/h8300.md (mulqihi3): Tighten predicates to
	register_operand.
	(mulhisi3): Likewise.
	(umulqisi3): Likewise.
	(umulhisi3): Likewise.

From-SVN: r49994
This commit is contained in:
Kazu Hirata 2002-02-23 13:45:36 +00:00 • committed by Kazu Hirata
parent ab8e22289c
commit 35dad9f1bc
2 changed files with 12 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
gcc/ChangeLog
View file

@ -1,3 +1,11 @@
2002-02-23 Kazu Hirata <kazu@hxi.com>
* config/h8300/h8300.md (mulqihi3): Tighten predicates to
register_operand.
(mulhisi3): Likewise.
(umulqisi3): Likewise.
(umulhisi3): Likewise.
2002-02-23 Neil Booth <neil@daikokuya.demon.co.uk>
* cppinit.c (output_deps): Correct test for stdout output.

8
gcc/config/h8300/h8300.md
View file

@ -841,7 +841,7 @@
(define_insn "mulqihi3"
[(set (match_operand:HI 0 "register_operand" "=r")
(mult:HI (sign_extend:HI (match_operand:QI 1 "general_operand" "%0"))
(mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "%0"))
(sign_extend:HI (match_operand:QI 2 "register_operand" "r"))))]
"TARGET_H8300H || TARGET_H8300S"
"mulxs.b %X2,%T0"
@ -850,7 +850,7 @@
(define_insn "mulhisi3"
[(set (match_operand:SI 0 "register_operand" "=r")
(mult:SI (sign_extend:SI (match_operand:HI 1 "general_operand" "%0"))
(mult:SI (sign_extend:SI (match_operand:HI 1 "register_operand" "%0"))
(sign_extend:SI (match_operand:HI 2 "register_operand" "r"))))]
"TARGET_H8300H || TARGET_H8300S"
"mulxs.w %T2,%S0"
@ -859,7 +859,7 @@
(define_insn "umulqihi3"
[(set (match_operand:HI 0 "register_operand" "=r")
(mult:HI (zero_extend:HI (match_operand:QI 1 "general_operand" "%0"))
(mult:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "%0"))
(zero_extend:HI (match_operand:QI 2 "register_operand" "r"))))]
""
"mulxu %X2,%T0"
@ -868,7 +868,7 @@
(define_insn "umulhisi3"
[(set (match_operand:SI 0 "register_operand" "=r")
(mult:SI (zero_extend:SI (match_operand:HI 1 "general_operand" "%0"))
(mult:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "%0"))
(zero_extend:SI (match_operand:HI 2 "register_operand" "r"))))]
"TARGET_H8300H || TARGET_H8300S"
"mulxu.w %T2,%S0"