* progmodes/verilog-mode.el (verilog-pretty-expr): Rework
verilog-pretty-expr to handle new assignment operators in system
verilog, such as += *= and the like.
(verilog-assignment-operator-re): Regular expression to find the
assigment operator in a verilog assignment.
(verilog-assignment-operation-re): Regular expression to find an
assignment statement for pretty-expr.
(verilog-in-attribute-p): Query returns true if point is in an
attribute context; used to skip these for expression line up from
pretty-expr.
(verilog-in-parameter-p): Query returns true if point is in an
parameter definition context; used to skip these for expression
line up from pretty-expr.
(verilog-in-parenthesis-p): Query returns true if point is in a
parenthetical expression, specifically ( ) but not [ ] or { };
used by pretty-expr.
(verilog-just-one-space): If there is no space, don't add one.
(verilog-get-lineup-indent-2): Specifically skip just attribute
contexts for expression lineup, rather than skipping all
parenthetical expressions.
(verilog-calculate-indent): Fix comment, and fix indent.
(verilog-do-indent): Indent declarations in lists (suggested by
Joachim Lechner).
(verilog-mode-abbrev-table): Populate abbrev mode with the various
skeleton items.
(verilog-sk-ovm-class): Add skeleton for OVM classes (reported
by Alain Mellan).
* verilog-mode.el (verilog-read-defines): Fix reading parameters
with embedded comments. Reported by Ray Stevens.
(verilog-calc-1, verilog-fork-wait-re) (verilog-forward-sexp,
verilog-wait-fork-re): Fix indentation of "wait fork", bug407.
Reported by Tim Holt.
(verilog-auto): Fix AUTOing a upper module then AUTOing module
instantiated by upper module causing wrong expansion until AUTOed a
second time. Reported by K C Buckenmaier.
(verilog-diff-auto): Fix showing .* as a difference when
`verilog-auto-star-save' off. Reported by Dan Dever.
(verilog-auto-reset, verilog-read-always-signals)
(verilog-auto-reset-blocking-in-non): Fix AUTORESET including
temporary signals in reset list if
verilog-auto-reset-blocking-in-non is nil, and match assignment
style to each signal's assignment type, bug381. Reported by
Thomas Esposito.
(verilog-sk-uvm-class, verilog-uvm-begin-re, verilog-uvm-end-re)
(verilog-uvm-statement-re): Support UVM indentation and
highlighting, with old OVM keywords only.
(verilog-auto-tieoff, verilog-auto-tieoff-declaration): Support
AUTOTIEOFF creating non-wire data types. Suggested by Jonathan
Greenlaw.
(verilog-auto-insert-lisp, verilog-delete-to-paren)
(verilog-forward-sexp-cmt, verilog-forward-sexp-ign-cmt)
(verilog-inject-sense, verilog-read-inst-pins)
(verilog-read-sub-decls, verilog-read-sub-decls-line): Fix
mismatching parenthesis inside commented out code when deleting
AUTOINST, bug383. Reported by Jonathan Greenlaw.
(verilog-auto-ascii-enum): Fix AUTOASCIIENUM one-hot with
non-numeric vector width. Reported by Alex Reed.
(verilog-auto-ascii-enum): Add "onehot" option to work around not
detecting signals with parameter widths. Reported by Alex Reed.
(verilog-auto-delete-trailing-whitespace): With
`verilog-auto-delete-trailing-whitespace' remove trailing
whitespace in auto expansion, bug371. Reported by Brad Dobbie.
(verilog-run-hooks, verilog-scan-cache-flush, verilog-syntax-ppss):
Fix verilog-scan-cache corruption when running user AUTO expansion
hooks that call indentation routines.
(verilog-simplify-range-expression): Fix typo ignoring lower case
identifiers.
(verilog-delete-auto): Fix delete-autos to also remove user created
automatics, as long as they start with AUTO.
(verilog-batch-diff-auto, verilog-diff-auto)
(verilog-diff-function): Add `verilog-diff-auto' and bind to
"C-c?" to report differences in AUTO expansion, ignoring spaces.
(verilog-backward-syntactic-ws-quick, verilog-beg-of-defun-quick)
(verilog-in-paren-quick, verilog-re-search-backward-quick)
(verilog-re-search-forward-quick, verilog-syntax-ppss): Fix
calling `syntax-ppss' when inside auto expansions as the ppss hook
is disabled and its cache will get corrupt, causing AUTOS not to
expand. Instead use only -quick functions.
(verilog-scan-region): Fix scanning over escaped quotes.
(verilog-inside-comment-or-string-p, verilog-inside-comment-p)
(verilog-re-search-backward-quick)
(verilog-re-search-forward-quick, verilog-scan): verilog-scan and
related functions now ignore strings, to fix misparsing of strings
with magic comments embedded in them.
(verilog-read-auto-template): Fix
'verilog-auto-inst-template-numbers' with extra newline before (.
Reported by Brad Dobbie.
(verilog-read-auto-template): Fix
'verilog-auto-inst-template-numbers' with comments. Reported by
Brad Dobbie.
(verilog-auto-inst, verilog-auto-inst-param)
(verilog-auto-inst-sort): Add 'verilog-auto-inst-sort' to reduce
merge conflicts with AUTOINST, bug358. Reported by Brad Dobbie.
(verilog-auto-inst-template-numbers): Add 'lhs' policy for
debugging templates without merge conflicts, bug357. Reported by
Brad Dobbie.
(verilog-read-auto-template): Fix
verilog-auto-inst-template-numbers with multiple templates.
Reported by Brad Dobbie.
(verilog-define-abbrev): Fix verilog-mode abbrevs to be system
abbrevs so user won't be asked to save.
(verilog-read-auto-lisp-present): Fix to start at beginning of
buffer in case called outside of verilog-auto.
(verilog-simplify-range-expression): Fix AUTOWIRE expanding "X-1+1"
to "X-2". Reported by Matthew Myers.
(verilog-auto, verilog-auto-inout-in): Add AUTOINOUTIN for creating
all inputs from module templates. Reported by Leith Johnson.
(verilog-module-inside-filename-p): Fix locating programs as with
modules.
(verilog-auto-inst-port): Fix vl-width expressions when using
verilog-auto-inst-param-value, bug331. Reported by Julian Gorfajn.
(verilog-decls-get-regs, verilog-decls-get-signals,
verilog-decls-get-vars, verilog-decls-get-wires, verilog-decls-new,
verilog-modi-cache-add-vars, verilog-modi-cache-add-wires,
verilog-read-decls): Combine reg and wire structures into one var
structure to represent SystemVerilog concepts.
(verilog-auto-ascii-enum, verilog-auto-logic, verilog-auto-reg)
(verilog-auto-reg-input, verilog-auto-tieoff, verilog-auto-wire)
(verilog-auto-wire-type, verilog-insert-definition): Add
verilog-auto-wire-type and AUTOLOGIC to support using
SystemVerilog "logic" keyword instead of "wire"/"reg".
(verilog-auto-reg-input, verilog-decls-get-signals): Fix AUTOWIRE
to declares outputs that also have assignments (presumably in an
ifdef or generate if so there's not a driver conflict). Reported
by Matthew Myers.
(verilog-auto-declare-nettype, verilog-insert-definition): Add
verilog-auto-declare-nettype to fix declarations using
`default_nettype none. Reported by Julian Gorfajn.
(verilog-read-always-signals-recurse, verilog-read-decls)
(verilog-read-sub-decls-gate): Fix infinite loop with (*) and
malformed end statement, bug325. Reported by Joshua Wise and
Andrew Drake.
(verilog-auto-star-safe, verilog-delete-auto-star-implicit)
(verilog-inst-comment-re): Fix not deleting Interfaced comment
when expanding .* in interfaces, bug320. Reported by Pierre-David
Pfister.
(verilog-read-module-name): Fix import statements between module
name and open parenthesis, bug317. Reported by Pierre-David
Pfister.
(verilog-simplify-range-expression): Fix simplification of
multiplications inside AUTOWIRE connections, bug303.
(verilog-auto-inst-port): Support parameter expansion in
multidimensional arrays.
(verilog-read-decls): Fix AUTOREG etc looking for "endproperty"
after "assert property". Reported by Julian Gorfajn.
(verilog-simplify-range-expression): Fix "couldn't merge" errors
with multiplication, bug303.
(verilog-read-decls): Fix parsing of unsigned data types, bug302.
(verilog-read-decls, verilog-read-sub-decls-sig): Fix AUTOWIRE and
AUTOINOUT for SV style multidimensional arrays, bug294. Reported
by Eric Mastromarchi.
(verilog-preprocess): Use with-current-buffer and
font-lock-fontify-buffer to cleanup style issues.
This file should be copied to the trunk verbatim.
* verilog-mode.el (verilog-directive-re): Make this variable
auto-built for efficiency of execution and updating.
(verilog-extended-complete-re): Support 'pure' fucntion & task
declarations (these have no bodies).
(verilog-beg-of-statement): general cleanup to enable support of
'pure' fucntion & task declarations (these have no bodies). These
efforts together fix Verilog bug210 from veripool; which was also
noticed by Steve Pearlmutter.
(verilog-directive-re, verilog-directive-begin, verilog-indent-re)
(verilog-directive-nest-re, verilog-set-auto-endcomments): Support
`elsif. Reported by Shankar Giri.
(verilog-forward-ws&directives, verilog-in-attribute-p): Fixes for
attribute handling for lining up declarations and assignments.
(verilog-beg-of-statement-1): Fix issue where continued declaration
is indented differently if it is after a begin..end clock.
(verilog-in-attribute-p, verilog-skip-backward-comments)
(verilog-skip-forward-comment-p): Support proper treatment of
attributes by indent code. Reported by Jeff Steele.
(verilog-in-directive-p): Fix comment to correctly describe
function.
(verilog-backward-up-list, verilog-in-struct-region-p)
(verilog-backward-token, verilog-in-struct-p)
(verilog-in-coverage-p, verilog-do-indent)
(verilog-pretty-declarations): Use verilog-backward-up-list as
wrapper around backward-up-list inorder to properly skip comments.
Reported by David Rogoff.
(verilog-property-re, verilog-endcomment-reason-re)
(verilog-beg-of-statement, verilog-set-auto-endcomments)
(verilog-calc-1 ): Fix for assert a; else b; indentation (new form
of if). Reported by Max Bjurling and
(verilog-calc-1): Fix for clocking block in modport
declaration. Reported by Brian Hunter.
* verilog-mode.el (verilog-auto-inst, verilog-gate-ios)
(verilog-gate-keywords, verilog-read-sub-decls)
(verilog-read-sub-decls-gate, verilog-read-sub-decls-gate-ios)
(verilog-read-sub-decls-line, verilog-read-sub-decls-sig): Support
AUTOINST for gate primitives, bug284. Reported by Mark Johnson.
(verilog-read-decls): Fix spaces in V2K module parameters causing
mis-identification as interfaces, bug287.
(verilog-read-decls): Fix not treating "parameter string" as a
parameter in AUTOINSTPARAM.
(verilog-read-always-signals-recurse, verilog-read-decls): Fix not
treating `elsif similar to `endif inside AUTOSENSE.
(verilog-do-indent): Implement correct automatic or static task or
function end comment highlight. Reported by Steve Pearlmutter.
(verilog-font-lock-keywords-2): Fix highlighting of single
character pins, bug264. Reported by Michael Laajanen.
(verilog-auto-inst, verilog-read-decls, verilog-read-sub-decls)
(verilog-read-sub-decls-in-interfaced, verilog-read-sub-decls-sig)
(verilog-subdecls-get-interfaced, verilog-subdecls-new): Support
interfaces with AUTOINST, bug270. Reported by Luis Gutierrez.
(verilog-pretty-expr): Fix interactive arguments, bug272. Reported
by Mark Johnson.
(verilog-auto-tieoff, verilog-auto-tieoff-ignore-regexp): Add
'verilog-auto-tieoff-ignore-regexp' for AUTOTIEOFF,
bug269. Suggested by Gary Delp.
(verilog-mode-map, verilog-preprocess, verilog-preprocess-history)
(verilog-preprocessor, verilog-set-compile-command): Create
verilog-preprocess and verilog-preprocessor to show preprocessed
output.
(verilog-get-beg-of-line, verilog-get-end-of-line)
(verilog-modi-file-or-buffer, verilog-modi-name)
(verilog-modi-point, verilog-within-string): Move defmacro's
before first use to avoid warning. Reported by Steve Pearlmutter.
(verilog-colorize-buffer, verilog-colorize-include-files-buffer)
(verilog-colorize-region, verilog-highlight-buffer)
(verilog-highlight-includes, verilog-highlight-modules)
(verilog-highlight-region, verilog-mode): Rename colorize to
highlight to match other packages. Disable module highlighting,
as received speed complaints, reenable for experimentation only
using new verilog-highlight-modules.
(verilog-read-decls): Fix regexp stack overflow in very large
AUTO_TEMPLATEs, bug250.
(verilog-auto, verilog-delete-auto, verilog-save-buffer-state)
(verilog-scan): Create verilog-save-buffer-state to standardize
making insignificant changes that shouldn't call hooks.
(verilog-save-no-change-functions, verilog-save-scan-cache)
(verilog-scan, verilog-scan-cache-ok-p, verilog-scan-region):
Create verilog-save-no-change-functions to wrap verilog-scan
preservation, and fix to work with nested preserved calls.
(verilog-auto-inst, verilog-auto-inst-dot-name): Support .name
port syntax for AUTOWIRE, and with new verilog-auto-inst-dot-name
generate .name with AUTOINST, bug245. Suggested by David Rogoff.
(verilog-submit-bug-report): Update variable list to be complete.
(verilog-auto, verilog-colorize-region): Fix AUTO expansion
breaking on-the-fly font-locking.
(verilog-colorize-buffer, verilog-colorize-include-files)
(verilog-colorize-include-files-buffer, verilog-colorize-region)
(verilog-load-file-at-mouse, verilog-load-file-at-point)
(verilog-mode, verilog-read-inst-module-matcher): With point on a
AUTOINST cell instance name, middle mouse button now finds-file on
it. Suggested by Brad Dobbie.
(verilog-alw-get-temps, verilog-auto-reset)
(verilog-auto-sense-sigs, verilog-read-always-signals)
(verilog-read-always-signals-recurse): Fix loop indexes being
AUTORESET. AUTORESET now assumes any variables in the
initialization section of a for() should be ignored. Reported by
Dan Dever.
(verilog-error-font-lock-keywords)
(verilog-error-regexp-emacs-alist)
(verilog-error-regexp-xemacs-alist): Fix error detection of
Cadence HAL, reported by David Asher. Repair drift between the
three similar error variables.
(verilog-modi-lookup, verilog-modi-lookup-cache)
(verilog-modi-lookup-last-current, verilog-modi-lookup-last-mod)
(verilog-modi-lookup-last-modi, verilog-modi-lookup-last-tick):
Fix slow verilog-auto expansion on very large files.
(verilog-read-sub-decls-expr, verilog-read-sub-decls-line): Fix
AUTOOUTPUT treating "1*2" as a signal name in submodule connection
"{1*2{...". Broke in last revision.
(verilog-read-sub-decls-expr): Fix AUTOOUTPUT not detecting
submodule connections with replications "{#{a},#{b}}".
* progmodes/verilog-mode.el (verilog-type-font-keywords): Use
font-lock-constant-face, not obsolete font-lock-reference-face.
* htmlfontify.el (hfy-face-resolve-face): New function.
(hfy-face-to-style): Use it (Bug#6279).
font-lock-constant-face, not obsolete font-lock-reference-face.
* htmlfontify.el (hfy-face-resolve-face): New function.
(hfy-face-to-style): Use it (Bug#6279).
"disable fork" and "fork wait" multi word keywords, suggested by
Steve Pearlmutter.
(verilog-pretty-declarations): Support lineup of declarations in
port lists.
(verilog-skip-backward-comments, verilog-skip-forward-comment-p):
fix bug for /* / comments
(verilog-backward-syntactic-ws, verilog-forward-syntactic-ws):
Speed up and simplfy as this is never called with a bound.
(verilog-pretty-declarations): Enhance to line up declarations
inside a parameter list, suggested by Alan Morgan.
(verilog-pretty-expr): Tune assignment regular expression match
string for corner cases; also use markers instead of character
number as indent changes the later.
(verilog-type-keywords): Fix pulldown as missing
keyword.
(verilog-read-sub-decls-line): Fix comments in AUTO_TEMPLATE
causing truncation of AUTOWIRE signals. Reported by Bruce
Tennant.
(verilog-auto-inst, verilog-auto-inst-port): Add vl_mbits for
AUTO_TEMPLATEs needing multiple array bits. Suggested by Bruce
Tennant.
(verilog-keywords):
(verilog-1800-2005-keywords, verilog-1800-2009-keywords): Add IEEE
1800-2009 keywords, including "global.".
verilog-vmm-statement-re, verilog-ovm-statement-re,
verilog-defun-level-not-generate-re, verilog-calculate-indent,
verilog-leap-to-head, verilog-backward-token): Fix
indenting VMM macros. Reported by Jonathan Ashbrook.
* verilog-mode.el (verilog-auto-lineup, verilog-nameable-item-re):
Cleanup user-visible spelling and documentation errors. One
reported by Gary Delp.
(verilog-submit-bug-report): Mention bug tracking and CC
co-author.
(verilog-read-decls): Fix AUTOWIRE with types declared in a
package, bug195. Reported by Pierre-David Pfister.
Remove extra save-excursions and make-variable-buffer-local's.
Suggested by Stefan Monnier.
(verilog-getopt-file, verilog-module-inside-filename-p)
(verilog-set-define): Merge GNU 1.35 and repair changes from
switching to using with-current-buffer.
(verilog-read-always-signals-recurse): Fix "a == 2'b00 ? b : c"
being treated as a number and confusing AUTORESET.
Reported by Dan Dever.
(verilog-auto-ignore-concat, verilog-read-sub-decls-expr):
Add verilog-auto-ignore-concat to fix backward compatibility with
older verilog-modes. Reported by Dan Katz.
(verilog-read-auto-template): Fix AUTO_TEMPLATEs with regexps
containing closing anchors "...$".
(verilog-read-decls): Fix AUTOREG not detecting "assign {a,b}".
Reported by Wade Smith.
(verilog-batch-execute-func) Comment on function usage.
(verilog-label-re): Fix regular expression for labels.
(verilog-label-re, verilog-calc-1): Support proper indent of named
asserts.
(verilog-backward-token, verilog-basic-complete-re)
(verilog-beg-of-statement, verilog-indent-re): Support proper
indent of the assert statement at the beginning of a block of text.
(verilog-beg-block-re, verilog-ovm-begin-re): Support the
`ovm_object_param_utils_begin and `ovm_component_param_utils_begin
tokens as begins.
representation of verilog error regular expressions to work with
Emacs-22's new format.
(verilog-error-regexp-xemacs-alist): Coded custom representation
of verilog error regular expressions to work with XEmacs format
(verilog-error-regexp-add-xemacs): Hook routine to install verilog
error recognition into XEmacs.
(verilog-error-regexp-add-emacs): Hook routine to install verilog
error recognition into Emacs-22.
(verilog-endcomment-reason-re): Support unique case and priority
case.
(verilog-basic-complete-re): Support localparam lineup.
(verilog-beg-of-statement-1): Fix for robustness, unique case.
(verilog-set-auto-endcomments): Fix for unique case, always_comb
commenting.
(verilog-leap-to-case-head): Now support *nested* unique &
priority case statements.
(verilog-auto-lineup): Make just declarations the default (as it
had been).
(verilog-leap-to-case-head): Support priority/unique case
statements.
(verilog-auto-lineup): Rework to give users radio buttons to
select the various styles of automatic lineup
(verilog-error-regexp-alist): Rework to support the XEmacs style
of error regular expressions from compilers, lint tools &
simulators. Note that GNU Emacs has made it impossible for a mode
to load such things.
(electric-verilog-terminate-line, verilog-indent-declaration)
(verilog-auto-wiure): Rework for radio button selection of
auto-lineup selection of specification of auto lineup.
(verilog-beg-of-statement-1): Redesign to support proper operation
in additional code, based on testing with auto-lineup.
(verilog-calculate-indent, assignments & declarations)
(verilog-backward-token): Enhance to support auto-lineup of
assignments & declarations.
(verilog-in-directive-p, verilog-at-struct-p): New function for
easy test of whether we are.
(verilog-pretty-declarations, verilog-pretty-expr): Massive rework
to support safe execution at almost anyline.
(verilog-calc-1): Properly support indenting deep inside generate
blocks.
(verilog-init-font) Remove definition & use of verilog-init-font,
as it is redundant with font-lock-defaults.
(verilog-mode): Alter the definition of verilog-font-lock-defualts
to avoid circular calls if syntax-ppss is a function (as is the
case now in 22.x GNU Emacs) as that function would sometimes call
itself, leading to (nearly) infinite recursion
(verilog-ovm-begin-re, verilog-ovm-end-re)
(verilog-ovm-statement-re, verilog-leap-to-head)
(verilog-backward-token): Add support for OVM macros. Some are
complete statements, and others open and close scopes like begin
and end.
(verilog-defun-level-not-generate-re, verilog-defun-level-re)
(verilog-defun-level-generate-only-re): Really fix the defun-list
compilation issue
(verilog-calc-1) (verilog-beg-of-statement): Enhance support for
coverpoint, constraint and cross statements
(verilog-defun-level-list, verilog-generate-defun-level-list)
(verilog-all-defun-level-list): Redo these specifications - it is
too hard to support eval-when compile aggregation of lists also
built at when-compile time.
(verilog-defun-level-list): Place defconsts of variables used in
building regular expressions which are built in eval-when-compile
bodies in the same eval-when-compile body to facilitate compile
without load.
(verilog-beg-block-re-ordered): Support indenting
virtual/protected tasks and functions.
(verilog-defun-level-list,verilog-in-generate-region-p)
(verilog-backward-ws&directives, verilog-calc-1): Speed up
indentation of some module items (generate items).
(verilog-forward-sexp, verilog-leap-to-head): Support stepping
across virtual/protected tasks and functions.
* verilog-mode.el (verilog-auto-arg, verilog-auto-arg-sort): Allow
sorting AUTOARG lists. Suggested by Andrea Fedeli.
(verilog-read-sub-decls-line): Fix AUTOWIRE signals getting lost
in concatenations. Reported by Yishay Belkind.
(verilog-auto-ascii-enum): Support one-hot state machines in
AUTOASCIIENUM. Suggested by Lloyd Gomez.
(verilog-auto-inst, verilog-auto-inst-port): Include interface
modport in AUTOINST and add vl-modport for users. Reported by
David Rogoff.
(verilog-auto-inout-module, verilog-auto-inst)
(verilog-decls-get-interfaces, verilog-insert-definition)
(verilog-insert-one-definition, verilog-read-decls)
(verilog-read-sub-decls, verilog-read-sub-decls-sig)
(verilog-sig-modport, verilog-signals-combine-bus)
(verilog-subdecls-get-interfaces): Fix expansion of SystemVerilog
interfaces in AUTOINOUTMODULE, AUTOINOUTCOMP, and AUTOINST.
Suggested by David Rogoff.
(verilog-repair-open-comma): Fix non-insertion of comma when
`DEFINE occurs in V2K argument list. Reported by Lane Brooks.
(verilog-make-width-expression): Simplify [A-1:0] expression
widths to just {A{1'b0}}.
(verilog-mode): Cleanup checkdoc warnings.
(verilog-auto-inout-module, verilog-signals-matching-dir-re): Add
third optional regexp to AUTOINOUTMODULE to allow selecting only
inputs/outputs or data type. Suggested by Vasu Kandadi.
(next-error-last-buffer): Fix byte-compiler warning.
(verilog-auto, verilog-auto-insert-lisp, verilog-auto-inst)
(verilog-delete-auto): Add AUTOINSERTLISP to insert arbitrary lisp
or shell command text during AUTO expansion. Suggested by Tad
Truex.
(verilog-read-sub-decls-expr, verilog-read-sub-decls-line)
(verilog-read-sub-decls-sig, verilog-symbol-detick-text): Fix
dotted nets {a.b,c.d} and excaped identifiers being mis-included
in AUTOINOUT. Reported by Matthew Lovell.
(verilog-read-always-signals-recurse): Fix AUTORESET "if (a<=b)"
causing use of <= assignments. Reported by Alex Reed.
(verilog-read-decls): Fix triand, trior, wand, wor to be
recognized by AUTOWIRE. Reported by Spencer Isaacson.
(verilog-extended-complete-re): Support import "DPI-C" functions.
(verilog-read-always-signals-recurse): Fix AUTORESET of "x <=
y[a+1:a+1]" to not include a in reset list. Reported by Dan
Dever.
(verilog-insert-date, verilog-insert-year)
(verilog-sk-header-tmpl): Fix verilog-header inserting error on
Windows systems. Reported by Michael Potts.
(verilog-read-module-name): Fix AUTOINST when the child module
declaration's name is a tick define. Reported by Elliot Mednick.
(verilog-read-decls): Fix V2K parameter bit subscripts getting
passed to next parameter's definition. Reported by Bruce T.
(verilog-read-decls): Fix detecting "parameter int" when using
AUTOINSTPARAM. Reported by Bruce T.
(verilog-goto-defun): Fix goto not finding modules unless first
perform a verilog-auto expansion. Suggested by Lawrence Butcher.
(verilog-mode): Expand -f flag arguments on entry to mode so
verilog-goto-defun will work. Reported by Lawrence Butcher.
(verilog-getopt): Expand environment variables in -f file
arguments. Suggested by Lawrence Butcher.
(verilog-set-define): Fix "Symbol's value as variable is void"
when reading enumerations.
(verilog-auto-ascii-enum): Fix duplicate labels in AUTOASCIIENUM.
Suggested by Stephen Peltan.
(verilog-read-defines): Fix reading of enumerations in include
files. Reported by Steve Peltan.
filename extensions to call verilog-mode.
(verilog-auto, verilog-auto-inst, verilog-faq)
(verilog-submit-bug-report): Update author support URLs.
(verilog-delete-auto, verilog-auto-inout-module)
(verilog-auto-inout-comp, verilog-auto): Add AUTOINOUTCOMP for
creating complemented testbench modules. Suggested by Yishay
Belkind.
(verilog-auto-inst-port, verilog-simplify-range-expression): When
verilog-auto-inst-param-value is set, don't require a
AUTO_TEMPLATE to expand parameter substitutions. Suggested by
Yishay Belkind.
(verilog-auto-inst-param-value): Add safe variable.
(verilog-re-search-forward, verilog-re-search-backward): Fix
returning wrong search results on Emacs 22.1.
(verilog-modi-cache-results, verilog-auto): Fix warning message
about "toggling font-lock-mode."
(verilog-auto): Fix loosing font-lock on errors.
(verilog-auto-inst-param-value, verilog-mode-version)
(verilog-mode-version-date, verilog-read-inst-param-value)
(verilog-auto-inst, verilog-auto-inst-param)
(verilog-auto-inst-port, verilog-simplify-range-expression): Allow
parameters to be replaced with their values, on the expansion of
an AUTOINST with Verilog 2001 style parameter settings. Suggested
by David Rogoff.
* verilog-mode.el (verilog-beg-block-re-ordered, verilog-calc-1):
Better support for the property statement. Sometimes this keyword
introduces a statement which requires an endproperty keyword, and
sometimes it doesn't, dependening on the work before the property
word. If property is prefixed with assert, assume or cover
keyword, then the statement is ended with a ';' Otherwise,
property is like task or specify, and is followed by some number
of statements, which are ended with an endproperty keyword.
(electric-verilog-tab): Support Emacs 22.2 style handling of tab
in a highlighted region: indent each line in region according to
mode. Supply this so it works in XEmacs and older Emacs.
declarations inside a parenthetical list. The code is ill-advised,
and doesn't work given user defined types.
(verilog-set-auto-endcomments): Enhance function automatic
endcomment to support functions that return user defined types.
(verilog-mode): Add code to tell which-function-mode minor mode
that Verilog supports this feature.
(verilog-beg-block-re-ordered, verilog-indent-re)
(verilog-forward-sexp, verilog-forward-wa, verilog-calc-1)
(verilog-leap-to-head): Support the new virtual and/or protected
tasks, as well as extern declarations of tasks for indenting and
for foward/backward expression.
* verilog-mode (verilog-read-decls): Allow AUTORESET to work with
SV 'logic' signals. [Julian Gorfajn]
(verilog-auto-inst-column): Make verilog-auto-inst-column
customizable.
(verilog-string-replace-matches): Avoid recursion with small
replacements.
(verilog-auto-inst-param-value, verilog-mode-version)
(verilog-mode-version-date, verilog-read-inst-param-value)
(verilog-auto-inst, verilog-auto-inst-param)
(verilog-auto-inst-port, verilog-simplify-range-expression): Add
verilog-auto-inst-param-value option for AUTOINST. [David Rogoff]
This allows parameters to be replaced with their values, on the
expansion of an AUTOINST with Verilog 2001 style parameter
settings.
as pragma keywords.
(verilog-pretty-expr): Support lining up assignments which include
part selects.
(verilog-mode): More portable check for the availability of
hideshow support.
(verilog-do-indent): Remove special indent for declarations inside
a parenthetical list. The code is ill-advised, and doesn't work
given the new user defined types.
(verilog-set-auto-endcomments): Enhance function automatic
endcomment to support functions that return user defined types.
(verilog-mode): Add code to tell which-function-mode minor mode
that Verilog supports this feature.
(verilog-auto-input, verilog-auto-inout, verilog-auto)
(verilog-delete-auto): Add optional regular expression to
AUTOINPUT/AUTOOUTPUT/AUTOINOUT.
(verilog-signals-matching-regexp): New internal function for
signal matching.
(verilog-stmt-menu, verilog-menu): Add :help and filter it.
(verilog-customize, verilog-font-customize)
(electric-verilog-backward-sexp, electric-verilog-forward-sexp)
(verilog-mode): Update documentation strings to match tool tips.
(verilog-auto-search-do, verilog-auto-re-search-do)
(verilog-skip-forward-comment-or-string): Fix verilog-auto
expansion when a .* appears inside a string.
(verilog-re-search-forward, verilog-re-search-backward): Add
comment to recall how this works.
