nasm/x86
H. Peter Anvin (Intel) d85a6101d7 BR 3392681: handle a64 instruction patters correctly
The a64 instruction patterns would incorrectly force REX to zero at a
point where REX prefixes have already been assigned. This is not only
incorrect in case of instructions which can use high registers, but it
causes an assertion failure. It happened to work for J*CXZ and LOOP*.

Reported-by: Philip Lantz <philip.lantz@intel.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-06-22 13:52:02 -07:00
..
disp8.c disp8: make constant arrays in get_disp8N() static 2016-08-25 17:40:13 -07:00
iflags.ph LEA: allow immediate syntax; ignore operand size entirely 2019-08-14 15:23:00 -07:00
insns-iflags.ph insns.pl: use less cantankerous string expansion; better error info 2019-08-09 02:41:37 -07:00
insns.dat BR 3392681: handle a64 instruction patters correctly 2020-06-22 13:52:02 -07:00
insns.pl obsolete handing: handle a few more subcases in a useful way 2019-08-09 14:52:16 -07:00
regs.dat
regs.pl perl files: clean up warnings 2019-08-09 13:30:19 -07:00