66 lines
2.9 KiB
C
66 lines
2.9 KiB
C
/* insns.h header file for insns.c
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*
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* The Netwide Assembler is copyright (C) 1996 Simon Tatham and
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* Julian Hall. All rights reserved. The software is
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* redistributable under the licence given in the file "Licence"
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* distributed in the NASM archive.
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*/
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#ifndef NASM_INSNS_H
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#define NASM_INSNS_H
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struct itemplate {
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int opcode; /* the token, passed from "parser.c" */
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int operands; /* number of operands */
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long opd[3]; /* bit flags for operand types */
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char *code; /* the code it assembles to */
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int flags; /* some flags */
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};
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/*
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* Instruction template flags. These specify which processor
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* targets the instruction is eligible for, whether it is
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* privileged or undocumented, and also specify extra error
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* checking on the matching of the instruction.
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*
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* IF_SM stands for Size Match: any operand whose size is not
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* explicitly specified by the template is `really' intended to be
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* the same size as the first size-specified operand.
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* Non-specification is tolerated in the input instruction, but
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* _wrong_ specification is not.
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*
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* IF_SM2 invokes Size Match on only the first _two_ operands, for
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* three-operand instructions such as SHLD: it implies that the
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* first two operands must match in size, but that the third is
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* required to be _unspecified_.
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*
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* IF_SB invokes Size Byte: operands with unspecified size in the
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* template are really bytes, and so no non-byte specification in
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* the input instruction will be tolerated. IF_SW similarly invokes
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* Size Word, and IF_SD invokes Size Doubleword.
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*
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* (The default state if neither IF_SM nor IF_SM2 is specified is
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* that any operand with unspecified size in the template is
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* required to have unspecified size in the instruction too...)
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*/
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#define IF_SM 0x0001 /* size match */
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#define IF_SM2 0x0002 /* size match first two operands */
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#define IF_SB 0x0004 /* unsized operands can't be non-byte */
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#define IF_SW 0x0008 /* unsized operands can't be non-word */
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#define IF_SD 0x0010 /* unsized operands can't be nondword */
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#define IF_8086 0x0000 /* 8086 instruction */
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#define IF_186 0x0100 /* 186+ instruction */
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#define IF_286 0x0200 /* 286+ instruction */
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#define IF_386 0x0300 /* 386+ instruction */
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#define IF_486 0x0400 /* 486+ instruction */
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#define IF_PENT 0x0500 /* Pentium instruction */
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#define IF_P6 0x0600 /* P6 instruction */
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#define IF_CYRIX 0x0800 /* Cyrix-specific instruction */
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#define IF_PMASK 0x0F00 /* the mask for processor types */
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#define IF_PRIV 0x1000 /* it's a privileged instruction */
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#define IF_UNDOC 0x2000 /* it's an undocumented instruction */
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#define IF_FPU 0x4000 /* it's an FPU instruction */
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#define IF_MMX 0x8000 /* it's an MMX instruction */
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#endif
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