81fd01f9d0
We could generate the MRI version (SSE 4.1) instead of the RMI (SSE 2) version of these instructions if a 64-bit register was given as the destination. Reported-by: Vasiliy Olekhov <olekhov@gmail.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
3 lines
29 B
NASM
3 lines
29 B
NASM
bits 64
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pextrw rax,xmm0,0
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