e1f985c167
Make the source code easier to understand and keep track of by organizing it into subdirectories depending on the function. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
159 lines
4.1 KiB
C
159 lines
4.1 KiB
C
#ifndef NASM_IFLAG_H
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#define NASM_IFLAG_H
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#include <string.h>
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#include "compiler.h"
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int ilog2_32(uint32_t v);
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#include "iflaggen.h"
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#define IF_GENBIT(bit) (UINT32_C(1) << (bit))
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static inline unsigned int iflag_test(const iflag_t *f, unsigned int bit)
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{
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unsigned int index = bit / 32;
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return f->field[index] & (UINT32_C(1) << (bit - (index * 32)));
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}
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static inline void iflag_set(iflag_t *f, unsigned int bit)
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{
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unsigned int index = bit / 32;
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f->field[index] |= (UINT32_C(1) << (bit - (index * 32)));
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}
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static inline void iflag_clear(iflag_t *f, unsigned int bit)
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{
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unsigned int index = bit / 32;
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f->field[index] &= ~(UINT32_C(1) << (bit - (index * 32)));
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}
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static inline void iflag_clear_all(iflag_t *f)
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{
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memset(f, 0, sizeof(*f));
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}
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static inline void iflag_set_all(iflag_t *f)
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{
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memset(f, 0xff, sizeof(*f));
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}
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static inline int iflag_cmp(const iflag_t *a, const iflag_t *b)
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{
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int i;
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for (i = sizeof(a->field) / sizeof(a->field[0]) - 1; i >= 0; i--) {
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if (a->field[i] == b->field[i])
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continue;
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return (a->field[i] > b->field[i]) ? 1 : -1;
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}
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return 0;
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}
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static inline int iflag_cmp_cpu(const iflag_t *a, const iflag_t *b)
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{
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if (a->field[3] < b->field[3])
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return -1;
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else if (a->field[3] > b->field[3])
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return 1;
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return 0;
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}
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static inline unsigned int iflag_ffs(const iflag_t *a)
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{
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unsigned int i;
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for (i = 0; i < sizeof(a->field) / sizeof(a->field[0]); i++) {
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if (a->field[i])
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return ilog2_32(a->field[i]) + (i * 32);
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}
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return 0;
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}
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#define IF_GEN_HELPER(name, op) \
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static inline iflag_t iflag_##name(const iflag_t *a, const iflag_t *b) \
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{ \
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unsigned int i; \
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iflag_t res; \
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\
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for (i = 0; i < sizeof(a->field) / sizeof(a->field[0]); i++) \
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res.field[i] = a->field[i] op b->field[i]; \
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\
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return res; \
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}
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IF_GEN_HELPER(xor, ^)
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/* Use this helper to test instruction template flags */
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#define itemp_has(itemp, bit) iflag_test(&insns_flags[(itemp)->iflag_idx], bit)
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/* Maximum processor level at moment */
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#define IF_PLEVEL IF_IA64
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/* Some helpers which are to work with predefined masks */
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#define IF_SMASK \
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(IF_GENBIT(IF_SB) |\
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IF_GENBIT(IF_SW) |\
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IF_GENBIT(IF_SD) |\
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IF_GENBIT(IF_SQ) |\
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IF_GENBIT(IF_SO) |\
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IF_GENBIT(IF_SY) |\
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IF_GENBIT(IF_SZ) |\
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IF_GENBIT(IF_SIZE))
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#define IF_ARMASK \
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(IF_GENBIT(IF_AR0) |\
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IF_GENBIT(IF_AR1) |\
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IF_GENBIT(IF_AR2) |\
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IF_GENBIT(IF_AR3) |\
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IF_GENBIT(IF_AR4))
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#define _itemp_smask(idx) (insns_flags[(idx)].field[0] & IF_SMASK)
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#define _itemp_armask(idx) (insns_flags[(idx)].field[0] & IF_ARMASK)
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#define _itemp_arg(idx) ((_itemp_armask(idx) >> IF_AR0) - 1)
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#define itemp_smask(itemp) _itemp_smask((itemp)->iflag_idx)
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#define itemp_arg(itemp) _itemp_arg((itemp)->iflag_idx)
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#define itemp_armask(itemp) _itemp_armask((itemp)->iflag_idx)
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static inline int iflag_cmp_cpu_level(const iflag_t *a, const iflag_t *b)
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{
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iflag_t v1 = *a;
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iflag_t v2 = *b;
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iflag_clear(&v1, IF_CYRIX);
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iflag_clear(&v1, IF_AMD);
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iflag_clear(&v2, IF_CYRIX);
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iflag_clear(&v2, IF_AMD);
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if (v1.field[3] < v2.field[3])
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return -1;
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else if (v1.field[3] > v2.field[3])
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return 1;
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return 0;
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}
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static inline iflag_t _iflag_pfmask(const iflag_t *a)
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{
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iflag_t r;
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iflag_clear_all(&r);
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if (iflag_test(a, IF_CYRIX))
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iflag_set(&r, IF_CYRIX);
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if (iflag_test(a, IF_AMD))
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iflag_set(&r, IF_AMD);
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return r;
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}
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#define iflag_pfmask(itemp) _iflag_pfmask(&insns_flags[(itemp)->iflag_idx])
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#endif /* NASM_IFLAG_H */
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