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insns: make the MMX version of PINSRW match the SSE/AVX ones

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Make the MMX version of PINSRW match the SSE and AVX ones, and add it
to the tests.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This commit is contained in:
H. Peter Anvin 2009-06-24 21:53:23 -07:00
parent d15bb009f6
commit ef3ef70ccf
4 changed files with 24 additions and 9 deletions
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6
insns.dat
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@ -1504,9 +1504,9 @@ PAVGW mmxreg,mmxrm \360\323\2\x0F\xE3\110 KATMAI,MMX,SQ
PEXTRW reg32,mmxreg,imm \360\2\x0F\xC5\110\26 KATMAI,MMX,SB,AR2
; PINSRW is documented as using a reg32, but it's really using only 16 bit
; -- accept either, but be truthful in disassembly
PINSRW mmxreg,reg16,imm \360\2\x0F\xC4\110\26 KATMAI,MMX
PINSRW mmxreg,reg32,imm \360\2\x0F\xC4\110\26 KATMAI,MMX,ND
PINSRW mmxreg,mem,imm \360\2\x0F\xC4\110\26 KATMAI,MMX,SW,AR1
PINSRW mmxreg,mem,imm \360\2\x0F\xC4\110\26 KATMAI,MMX,SB,AR2
PINSRW mmxreg,rm16,imm \360\2\x0F\xC4\110\26 KATMAI,MMX,SB,AR2
PINSRW mmxreg,reg32,imm \360\2\x0F\xC4\110\26 KATMAI,MMX,SB,AR2
PMAXSW mmxreg,mmxrm \360\323\2\x0F\xEE\110 KATMAI,MMX,SQ
PMAXUB mmxreg,mmxrm \360\323\2\x0F\xDE\110 KATMAI,MMX,SQ
PMINSW mmxreg,mmxrm \360\323\2\x0F\xEA\110 KATMAI,MMX,SQ

5
test/pinsr16.asm
View file

@ -1,5 +1,10 @@
bits 16
pinsrw mm0,eax,0
pinsrw mm1,si,0
pinsrw mm2,[bx],0
pinsrw mm3,word [bx],0
pinsrb xmm0,eax,0
pinsrb xmm1,sil,0
; pinsrb xmm1,bh,0

5
test/pinsr32.asm
View file

@ -1,5 +1,10 @@
bits 32
pinsrw mm0,eax,0
pinsrw mm1,si,0
pinsrw mm2,[ecx],0
pinsrw mm3,word [ecx],0
pinsrb xmm0,eax,0
pinsrb xmm1,sil,0
; pinsrb xmm1,bh,0

17
test/pinsr64.asm
View file

@ -1,24 +1,29 @@
bits 64
pinsrw mm0,eax,0
pinsrw mm1,si,0
pinsrw mm2,[rcx],0
pinsrw mm3,word [rcx],0
pinsrb xmm0,eax,0
pinsrb xmm1,sil,0 ; BROKEN
; pinsrb xmm1,bh,0 ; BROKEN
pinsrb xmm1,sil,0
; pinsrb xmm1,bh,0
pinsrb xmm2,[rcx],0
pinsrb xmm3,byte [rcx],0 ; BROKEN
pinsrb xmm3,byte [rcx],0
pinsrw xmm0,eax,0
pinsrw xmm1,si,0
pinsrw xmm2,[rcx],0
pinsrw xmm3,word [rcx],0 ; BROKEN
pinsrw xmm3,word [rcx],0
pinsrd xmm0,eax,0
pinsrd xmm1,esi,0
pinsrd xmm2,[rcx],0 ; BROKEN
pinsrd xmm2,[rcx],0
pinsrd xmm3,dword [rcx],0
pinsrq xmm0,rax,0
pinsrq xmm1,rsi,0
pinsrq xmm2,[rcx],0 ; BROKEN
pinsrq xmm2,[rcx],0
pinsrq xmm3,qword [rcx],0
vpinsrb xmm0,eax,0