procyberian/nasm
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Add FRED instructions

Browse source 
Add the FRED instructions: ERETU, ERETS, LKGS

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This commit is contained in:
H. Peter Anvin 2022-10-05 13:31:30 -07:00
parent 91580319bc
commit bb1233ccde
3 changed files with 15 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
disasm/disasm.c
View file

@ -1,5 +1,5 @@
/* ----------------------------------------------------------------------- *
*
*
* Copyright 1996-2012 The NASM Authors - All Rights Reserved
* See the file AUTHORS included with the NASM distribution for
* the specific copyright holders.
@ -14,7 +14,7 @@
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
@ -31,7 +31,7 @@
*
* ----------------------------------------------------------------------- */
/*
/*
* disasm.c where all the _work_ gets done in the Netwide Disassembler
*/

1
x86/iflags.ph
View file

@ -95,6 +95,7 @@ if_("AVX512VP2INTERSECT", "AVX-512 VP2INTERSECT instructions");
if_("AMXTILE", "AMX tile configuration instructions");
if_("AMXBF16", "AMX bfloat16 multiplication");
if_("AMXINT8", "AMX 8-bit integer multiplication");
if_("FRED", "Flexible Return and Exception Delivery (FRED)");
# Put these last [hpa: why?]
if_("OBSOLETE", "Instruction removed from architecture");

13
x86/insns.dat
View file

@ -715,8 +715,9 @@ JMP rm64 [m: o64nw ff /4] X86_64,LONG,BND
JMPE imm [i: odf 0f b8 rel] IA64
JMPE imm16 [i: o16 0f b8 rel] IA64
JMPE imm32 [i: o32 0f b8 rel] IA64
JMPE rm16 [m: o16 0f 00 /6] IA64
JMPE rm32 [m: o32 0f 00 /6] IA64
JMPE rm16 [m: norep o16 0f 00 /6] IA64
JMPE rm32 [m: norep o32 0f 00 /6] IA64
JMPE rm64 [m: norep o64 0f 00 /6] IA64,LONG
LAHF void [ 9f] 8086
LAR reg16,mem [rm: o16 0f 02 /r] 286,PROT,SW
LAR reg16,reg16 [rm: o16 0f 02 /r] 286,PROT
@ -6060,6 +6061,14 @@ TILERELEASE void [ vex.128.np.0f38.w0 49 c0] AMXTILE,FUTURE,LONG
TILESTORED mem,tmmreg [mr: vex.128.f3.0f38.w0 4b /r] AMXTILE,MIB,SIB,FUTURE,SX,LONG
TILEZERO tmmreg [r: vex.128.f2.0f38.w0 49 /3r0] AMXTILE,FUTURE,LONG
;# Flexible Return and Exception Delivery (FRED)
ERETS void [ f2 0f 01 ca] FRED,FUTURE,LONG,PRIV
ERETU void [ f3 0f 01 ca] FRED,FUTURE,LONG,PRIV
LKGS reg16 [m: f2 0f 00 /6] FRED,FUTURE,LONG,PRIV
LKGS reg32 [m: f2 0f 00 /6] FRED,FUTURE,LONG,PRIV,ND
LKGS reg64 [m: f2 0f 00 /6] FRED,FUTURE,LONG,PRIV,ND
LKGS mem [m: f2 0f 00 /6] FRED,FUTURE,LONG,PRIV,SW
;# Systematic names for the hinting nop instructions
; These should be last in the file
HINT_NOP0 rm16 [m: o16 0f 18 /0] P6,UNDOC