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BR 2413278: Nonoptimal forms of arithmetic instructions involving AX

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At some point, we lost the optimizations for the core arithmetic
operations involving AX.  Put them back.
This commit is contained in:
H. Peter Anvin 2008-12-29 19:58:36 -08:00
parent fd925d9512
commit 9ed8594a28
1 changed files with 24 additions and 0 deletions
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24
insns.dat
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@ -61,8 +61,11 @@ ADC rm16,imm8 \320\1\x83\202\275 8086
ADC rm32,imm8 \321\1\x83\202\275 386
ADC rm64,imm8 \324\1\x83\202\275 X64
ADC reg_al,imm \1\x14\21 8086,SM
ADC reg_ax,sbyte16 \320\1\x83\202\275 8086,SM
ADC reg_ax,imm \320\1\x15\31 8086,SM
ADC reg_eax,sbyte32 \321\1\x83\202\275 386,SM
ADC reg_eax,imm \321\1\x15\41 386,SM
ADC reg_rax,sbyte64 \324\1\x83\202\275 X64,SM
ADC reg_rax,imm \324\1\x15\255 X64,SM
ADC rm8,imm \1\x80\202\21 8086,SM
ADC rm16,imm \320\145\x81\202\141 8086,SM
@ -91,8 +94,11 @@ ADD rm16,imm8 \320\1\x83\200\275 8086
ADD rm32,imm8 \321\1\x83\200\275 386
ADD rm64,imm8 \324\1\x83\200\275 X64
ADD reg_al,imm \1\x04\21 8086,SM
ADD reg_ax,sbyte16 \320\1\x83\200\275 8086,SM
ADD reg_ax,imm \320\1\x05\31 8086,SM
ADD reg_eax,sbyte32 \321\1\x83\200\275 386,SM
ADD reg_eax,imm \321\1\x05\41 386,SM
ADD reg_rax,sbyte64 \324\1\x83\200\275 X64,SM
ADD reg_rax,imm \324\1\x05\255 X64,SM
ADD rm8,imm \1\x80\200\21 8086,SM
ADD rm16,imm \320\145\x81\200\141 8086,SM
@ -121,8 +127,11 @@ AND rm16,imm8 \320\1\x83\204\275 8086
AND rm32,imm8 \321\1\x83\204\275 386
AND rm64,imm8 \324\1\x83\204\275 X64
AND reg_al,imm \1\x24\21 8086,SM
AND reg_ax,sbyte16 \320\1\x83\204\275 8086,SM
AND reg_ax,imm \320\1\x25\31 8086,SM
AND reg_eax,sbyte32 \321\1\x83\204\275 386,SM
AND reg_eax,imm \321\1\x25\41 386,SM
AND reg_rax,sbyte64 \324\1\x83\204\275 X64,SM
AND reg_rax,imm \324\1\x25\255 X64,SM
AND rm8,imm \1\x80\204\21 8086,SM
AND rm16,imm \320\145\x81\204\141 8086,SM
@ -246,8 +255,11 @@ CMP rm16,imm8 \320\1\x83\207\275 8086
CMP rm32,imm8 \321\1\x83\207\275 386
CMP rm64,imm8 \324\1\x83\207\275 X64
CMP reg_al,imm \1\x3C\21 8086,SM
CMP reg_ax,sbyte16 \320\1\x83\207\275 8086,SM
CMP reg_ax,imm \320\1\x3D\31 8086,SM
CMP reg_eax,sbyte32 \321\1\x83\207\275 386,SM
CMP reg_eax,imm \321\1\x3D\41 386,SM
CMP reg_rax,sbyte64 \324\1\x83\207\275 X64,SM
CMP reg_rax,imm \324\1\x3D\255 X64,SM
CMP rm8,imm \1\x80\207\21 8086,SM
CMP rm16,imm \320\145\x81\207\141 8086,SM
@ -845,8 +857,11 @@ OR rm16,imm8 \320\1\x83\201\275 8086
OR rm32,imm8 \321\1\x83\201\275 386
OR rm64,imm8 \324\1\x83\201\275 X64
OR reg_al,imm \1\x0C\21 8086,SM
OR reg_ax,sbyte16 \320\1\x83\201\275 8086,SM
OR reg_ax,imm \320\1\x0D\31 8086,SM
OR reg_eax,sbyte32 \321\1\x83\201\275 386,SM
OR reg_eax,imm \321\1\x0D\41 386,SM
OR reg_rax,sbyte64 \324\1\x83\201\275 X64,SM
OR reg_rax,imm \324\1\x0D\255 X64,SM
OR rm8,imm \1\x80\201\21 8086,SM
OR rm16,imm \320\145\x81\201\141 8086,SM
@ -1097,8 +1112,11 @@ SBB rm16,imm8 \320\1\x83\203\275 8086
SBB rm32,imm8 \321\1\x83\203\275 386
SBB rm64,imm8 \324\1\x83\203\275 X64
SBB reg_al,imm \1\x1C\21 8086,SM
SBB reg_ax,sbyte16 \320\1\x83\203\275 8086,SM
SBB reg_ax,imm \320\1\x1D\31 8086,SM
SBB reg_eax,sbyte32 \321\1\x83\203\275 386,SM
SBB reg_eax,imm \321\1\x1D\41 386,SM
SBB reg_rax,sbyte64 \324\1\x83\203\275 X64,SM
SBB reg_rax,imm \324\1\x1D\255 X64,SM
SBB rm8,imm \1\x80\203\21 8086,SM
SBB rm16,imm \320\145\x81\203\141 8086,SM
@ -1210,8 +1228,11 @@ SUB rm16,imm8 \320\1\x83\205\275 8086
SUB rm32,imm8 \321\1\x83\205\275 386
SUB rm64,imm8 \324\1\x83\205\275 X64
SUB reg_al,imm \1\x2C\21 8086,SM
SUB reg_ax,sbyte16 \320\1\x83\205\275 8086,SM
SUB reg_ax,imm \320\1\x2D\31 8086,SM
SUB reg_eax,sbyte32 \321\1\x83\205\275 386,SM
SUB reg_eax,imm \321\1\x2D\41 386,SM
SUB reg_rax,sbyte64 \324\1\x83\205\275 X64,SM
SUB reg_rax,imm \324\1\x2D\255 X64,SM
SUB rm8,imm \1\x80\205\21 8086,SM
SUB rm16,imm \320\145\x81\205\141 8086,SM
@ -1338,8 +1359,11 @@ XOR rm16,imm8 \320\1\x83\206\275 8086
XOR rm32,imm8 \321\1\x83\206\275 386
XOR rm64,imm8 \324\1\x83\206\275 X64
XOR reg_al,imm \1\x34\21 8086,SM
XOR reg_ax,sbyte16 \320\1\x83\206\275 8086,SM
XOR reg_ax,imm \320\1\x35\31 8086,SM
XOR reg_eax,sbyte32 \321\1\x83\206\275 386,SM
XOR reg_eax,imm \321\1\x35\41 386,SM
XOR reg_rax,sbyte64 \324\1\x83\206\275 X64,SM
XOR reg_rax,imm \324\1\x35\255 X64,SM
XOR rm8,imm \1\x80\206\21 8086,SM
XOR rm16,imm \320\145\x81\206\141 8086,SM