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NASM 0.98p3-hpa

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This commit is contained in:
H. Peter Anvin 2002-04-30 20:54:13 +00:00
parent eba20a73f2
commit 900fa5b26b
7 changed files with 151 additions and 160 deletions
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18
MODIFIED Normal file
View file

@ -0,0 +1,18 @@
This is a modified version of NASM, modified and released by H. Peter
Anvin <hpa@zytor.com>; it is not the original form released by the
NASM authors.
The changes include:
1. Merged nasm098p3.zip with nasm-0.97.tar.gz to create a fully
buildable version for Unix systems (Makefile.in updates, etc.)
2. Changed insns.pl to create the instruction tables in nasm.h and
names.c, so that a new instruction can be added by adding it *only*
to insns.dat.
3. Added the following new instructions: SYSENTER, SYSEXIT, FXSAVE,
FXRSTOR, UD1, UD2 (the latter two are two opcodes that Intel
guarantee will never be used; one of them is documented as UD2 in
Intel documentation, the other one just as "Undefined Opcode" --
calling it UD1 seemed to make sense.)

56
Makefile.in
View file

@ -25,8 +25,8 @@ INSTALL_DATA = @INSTALL_DATA@
NASM = nasm.o nasmlib.o float.o insnsa.o assemble.o labels.o \
parser.o outform.o outbin.o outaout.o outcoff.o outelf.o \
outobj.o outas86.o outrdf.o outdbg.o preproc.o listing.o \
eval.o
outobj.o outas86.o outrdf.o outrdf2.o outdbg.o zoutieee.o \
preproc.o listing.o eval.o
NDISASM = ndisasm.o disasm.o sync.o nasmlib.o insnsd.o
@ -38,37 +38,39 @@ nasm: $(NASM)
ndisasm: $(NDISASM)
$(CC) -o ndisasm $(NDISASM)
assemble.o: assemble.c nasm.h nasmlib.h assemble.h insns.h
disasm.o: disasm.c nasm.h disasm.h sync.h insns.h names.c
eval.o: eval.c eval.h nasm.h nasmlib.h
float.o: float.c nasm.h
insnsa.o: insnsa.c nasm.h insns.h
insnsd.o: insnsd.c nasm.h insns.h
labels.o: labels.c nasm.h nasmlib.h
listing.o: listing.c nasm.h nasmlib.h listing.h
nasm.o: nasm.c nasm.h nasmlib.h preproc.h parser.h assemble.h labels.h \
assemble.o: assemble.c nasm.h insnsi.h nasmlib.h assemble.h insns.h
disasm.o: disasm.c nasm.h insnsi.h disasm.h sync.h insns.h names.c insnsn.c
eval.o: eval.c eval.h nasm.h insnsi.h nasmlib.h
float.o: float.c nasm.h insnsi.h
insnsa.o: insnsa.c nasm.h insnsi.h insns.h
insnsd.o: insnsd.c nasm.h insnsi.h insns.h
labels.o: labels.c nasm.h insnsi.h nasmlib.h
listing.o: listing.c nasm.h insnsi.h nasmlib.h listing.h
nasm.o: nasm.c nasm.h insnsi.h nasmlib.h preproc.h parser.h assemble.h labels.h \
outform.h listing.h
nasmlib.o: nasmlib.c nasm.h nasmlib.h
ndisasm.o: ndisasm.c nasm.h nasmlib.h sync.h disasm.h
outaout.o: outaout.c nasm.h nasmlib.h outform.h
outas86.o: outas86.c nasm.h nasmlib.h outform.h
outbin.o: outbin.c nasm.h nasmlib.h outform.h
outcoff.o: outcoff.c nasm.h nasmlib.h outform.h
outdbg.o: outdbg.c nasm.h nasmlib.h outform.h
outelf.o: outelf.c nasm.h nasmlib.h outform.h
outform.o: outform.c outform.h nasm.h
outobj.o: outobj.c nasm.h nasmlib.h outform.h
outrdf.o: outrdf.c nasm.h nasmlib.h outform.h
parser.o: parser.c nasm.h nasmlib.h parser.h float.h names.c
preproc.o: preproc.c nasm.h nasmlib.h macros.c
nasmlib.o: nasmlib.c nasm.h insnsi.h nasmlib.h
ndisasm.o: ndisasm.c nasm.h insnsi.h nasmlib.h sync.h disasm.h
outaout.o: outaout.c nasm.h insnsi.h nasmlib.h outform.h
outas86.o: outas86.c nasm.h insnsi.h nasmlib.h outform.h
outbin.o: outbin.c nasm.h insnsi.h nasmlib.h outform.h
outcoff.o: outcoff.c nasm.h insnsi.h nasmlib.h outform.h
outdbg.o: outdbg.c nasm.h insnsi.h nasmlib.h outform.h
outelf.o: outelf.c nasm.h insnsi.h nasmlib.h outform.h
outform.o: outform.c outform.h nasm.h insnsi.h
outobj.o: outobj.c nasm.h insnsi.h nasmlib.h outform.h
outrdf.o: outrdf.c nasm.h insnsi.h nasmlib.h outform.h
outrdf2.o: outrdf2.c nasm.h insnsi.h nasmlib.h outform.h
parser.o: parser.c nasm.h insnsi.h nasmlib.h parser.h float.h names.c insnsn.c
preproc.o: preproc.c nasm.h insnsi.h nasmlib.h macros.c
sync.o: sync.c sync.h
zoutieee.o: zoutieee.c nasm.h insnsi.h nasmlib.h outform.h
# These two source files are automagically generated from a single
# These source files are automagically generated from a single
# instruction-table file by a Perl script. They're distributed,
# though, so it isn't necessary to have Perl just to recompile NASM
# from the distribution.
insnsa.c insnsd.c: insns.dat insns.pl
insnsa.c insnsd.c insnsi.h insnsn.c: insns.dat insns.pl
perl $(srcdir)/insns.pl $(srcdir)/insns.dat
# This source file is generated from the standard macros file
@ -89,7 +91,7 @@ clean:
cd rdoff; $(MAKE) clean
spotless: clean
rm -f config.* Makefile
rm -f config.* Makefile *~
cd rdoff; $(MAKE) spotless
rdf:

7
insns.bas
View file

@ -5,11 +5,16 @@
' FIDO: Mark Junker@2:2437/47.21
'
' COMMENT: While I wrote this program I often asked me, if it isn't easier
' to write an interpreter for pearl-scripts :]
' to write an interpreter for Perl-scripts :]
'
' COMMENT: To start the program press SHIFT+F5 within the QBasic IDE
' or start it from the command-line with QBASIC /RUN MACROS
'
'
' THIS PROGRAM NEEDS TO BE UPDATED -- it doesn't create insnsi.h
' and insnsn.c. However, Perl interpreters are now available for both
' DOS and Windows, so it seems pointless to spend the effort.
'
DEFINT A-Z

10
insns.dat
View file

@ -8,9 +8,7 @@
; Format of file: all four fields must be present on every functional
; line. Hence `void' for no-operand instructions, and `\0' for such
; as EQU. If the last three fields are all `ignore', no action is
; taken except to register the opcode as being present. _ALL_ opcodes
; listed in the `enum' in nasm.h must be present in here, in the
; same order. This is to build the main instruction table for NASM.
; taken except to register the opcode as being present.
AAA void \1\x37 8086
AAD void \2\xD5\x0A 8086
@ -389,6 +387,8 @@ FXCH void \2\xD9\xC9 8086,FPU
FXCH fpureg \1\xD9\10\xC8 8086,FPU
FXCH fpureg,fpu0 \1\xD9\10\xC8 8086,FPU
FXCH fpu0,fpureg \1\xD9\11\xC8 8086,FPU
FXRSTOR mem \300\2\x0F\xAE\202 P6,FPU
FXSAVE mem \300\2\x0F\xAE\200 P6,FPU
FXTRACT void \2\xD9\xF4 8086,FPU
FYL2X void \2\xD9\xF1 8086,FPU
FYL2XP1 void \2\xD9\xF9 8086,FPU
@ -985,6 +985,8 @@ SUB rm32,imm \321\300\1\x81\205\41 386,SM
SUB mem,imm8 \300\1\x80\205\21 8086,SM
SUB mem,imm16 \320\300\1\x81\205\31 8086,SM
SUB mem,imm32 \321\300\1\x81\205\41 386,SM
SYSENTER void \2\x0F\x34 P6
SYSEXIT void \2\x0F\x36 P6,PRIV
TEST mem,reg8 \300\1\x84\101 8086,SM
TEST reg8,reg8 \300\1\x84\101 8086
TEST mem,reg16 \320\300\1\x85\101 8086,SM
@ -1003,6 +1005,8 @@ TEST rm32,imm \321\300\1\xF7\200\41 386,SM
TEST mem,imm8 \300\1\xF6\200\21 8086,SM
TEST mem,imm16 \320\300\1\xF7\200\31 8086,SM
TEST mem,imm32 \321\300\1\xF7\200\41 386,SM
UD1 void \2\x0F\xB9 286
UD2 void \2\x0F\x0B 286
UMOV mem,reg8 \300\2\x0F\x10\101 386,UNDOC,SM
UMOV reg8,reg8 \300\2\x0F\x10\101 386,UNDOC
UMOV mem,reg16 \320\300\2\x0F\x11\101 386,UNDOC,SM

81
insns.pl
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@ -1,6 +1,6 @@
#!/usr/bin/perl
#
# insns.pl produce insnsa.c and insnsd.c from insns.dat
# insns.pl produce insnsa.c, insnsd.c, insnsi.h, insnsn.c from insns.dat
#
# The Netwide Assembler is copyright (C) 1996 Simon Tatham and
# Julian Hall. All rights reserved. The software is
@ -102,6 +102,85 @@ print D "};\n";
close D;
print STDERR "Writing insnsi.h...\n";
open I, ">insnsi.h";
print I "/* This file is auto-generated from insns.dat by insns.pl" .
" - don't exit it */\n\n";
print I "/* This file in included by nasm.h */\n\n";
print I "/* Instruction names */\n";
print I "enum {";
$first = 1;
$maxlen = 0;
foreach $i (@opcodes) {
print I "," if ( !$first );
$first = 0;
print I "\n\tI_${i}";
$len = length($i);
$len++ if ( $i =~ /cc$/ ); # Condition codes can be 3 characters long
$maxlen = $len if ( $len > $maxlen );
}
print I "\n};\n\n";
print I "#define MAX_INSLEN ", $maxlen, "\n";
close I;
print STDERR "Writing insnsn.c...\n";
open N, ">insnsn.c";
print N "/* This file is auto-generated from insns.dat by insns.pl" .
" - don't exit it */\n\n";
print N "/* This file in included by names.c */\n\n";
print N "static char *insn_names[] = {";
$first = 1;
foreach $i (@opcodes) {
# Don't include conditional instructions
if ( $i !~ /cc$/ ) {
print N "," if ( !$first );
$first = 0;
$ilower = $i;
$ilower =~ tr/A-Z/a-z/;
print N "\n\t\"${ilower}\"";
}
}
print N "\n};\n\n";
print N "/* Conditional instructions */\n";
print N "static char *icn[] = {";
$first = 1;
foreach $i (@opcodes) {
# Only conditional instructions
if ( $i =~ /cc$/ ) {
$ins = $`; # Skip cc suffix
print N "," if ( !$first );
$first = 0;
$ilower = $i;
$ilower =~ tr/A-Z/a-z/;
print N "\n\t\"${ilower}\"";
}
}
print N "\n};\n\n";
print N "/* and the corresponding opcodes */\n";
print N "static int ico[] = {";
$first = 1;
foreach $i (@opcodes) {
# Only conditional instructions
if ( $i =~ /cc$/ ) {
$ins = $`; # Skip cc suffix
print N "," if ( !$first );
$first = 0;
print N "\n\tI_$i";
}
}
print N "\n};\n";
close N;
printf STDERR "Done: %d instructions\n", $insns;
sub format {

71
names.c
View file

@ -17,76 +17,11 @@ static char *reg_names[] = { /* register names, as strings */
"st7", "tr3", "tr4", "tr5", "tr6", "tr7"
};
static char *insn_names[] = { /* instruction names, as strings */
"aaa", "aad", "aam", "aas", "adc", "add", "and", "arpl",
"bound", "bsf", "bsr", "bswap", "bt", "btc", "btr", "bts",
"call", "cbw", "cdq", "clc", "cld", "cli", "clts", "cmc", "cmp",
"cmpsb", "cmpsd", "cmpsw", "cmpxchg", "cmpxchg486", "cmpxchg8b",
"cpuid", "cwd", "cwde", "daa", "das", "db", "dd", "dec", "div",
"dq", "dt", "dw", "emms", "enter", "equ", "f2xm1", "fabs",
"fadd", "faddp", "fbld", "fbstp", "fchs", "fclex", "fcmovb",
"fcmovbe", "fcmove", "fcmovnb", "fcmovnbe", "fcmovne",
"fcmovnu", "fcmovu", "fcom", "fcomi", "fcomip", "fcomp",
"fcompp", "fcos", "fdecstp", "fdisi", "fdiv", "fdivp", "fdivr",
"fdivrp",
"femms",
"feni", "ffree", "fiadd", "ficom", "ficomp", "fidiv",
"fidivr", "fild", "fimul", "fincstp", "finit", "fist", "fistp",
"fisub", "fisubr", "fld", "fld1", "fldcw", "fldenv", "fldl2e",
"fldl2t", "fldlg2", "fldln2", "fldpi", "fldz", "fmul", "fmulp",
"fnclex", "fndisi", "fneni", "fninit", "fnop", "fnsave",
"fnstcw", "fnstenv", "fnstsw", "fpatan", "fprem", "fprem1",
"fptan", "frndint", "frstor", "fsave", "fscale", "fsetpm",
"fsin", "fsincos", "fsqrt", "fst", "fstcw", "fstenv", "fstp",
"fstsw", "fsub", "fsubp", "fsubr", "fsubrp", "ftst", "fucom",
"fucomi", "fucomip", "fucomp", "fucompp", "fxam", "fxch",
"fxtract", "fyl2x", "fyl2xp1", "hlt", "ibts", "icebp", "idiv",
"imul", "in", "inc", "incbin", "insb", "insd", "insw", "int",
"int01", "int1", "int3", "into", "invd", "invlpg", "iret",
"iretd", "iretw", "jcxz", "jecxz", "jmp", "lahf", "lar", "lds",
"lea", "leave", "les", "lfs", "lgdt", "lgs", "lidt", "lldt",
"lmsw", "loadall", "loadall286", "lodsb", "lodsd", "lodsw",
"loop", "loope", "loopne", "loopnz", "loopz", "lsl", "lss",
"ltr", "mov", "movd", "movq", "movsb", "movsd", "movsw",
"movsx", "movzx", "mul", "neg", "nop", "not", "or", "out",
"outsb", "outsd", "outsw", "packssdw", "packsswb", "packuswb",
"paddb", "paddd", "paddsb", "paddsiw", "paddsw", "paddusb",
"paddusw", "paddw", "pand", "pandn", "paveb",
"pavgusb", "pcmpeqb",
"pcmpeqd", "pcmpeqw", "pcmpgtb", "pcmpgtd", "pcmpgtw",
"pdistib",
"pf2id", "pfacc", "pfadd", "pfcmpeq", "pfcmpge", "pfcmpgt",
"pfmax", "pfmin", "pfmul", "pfrcp", "pfrcpit1", "pfrcpit2",
"pfrsqit1", "pfrsqrt", "pfsub", "pfsubr", "pi2fd",
"pmachriw", "pmaddwd", "pmagw", "pmulhriw", "pmulhrwa", "pmulhrwc",
"pmulhw", "pmullw", "pmvgezb", "pmvlzb", "pmvnzb",
"pmvzb", "pop", "popa", "popad", "popaw", "popf", "popfd",
"popfw", "por",
"prefetch", "prefetchw", "pslld", "psllq", "psllw", "psrad", "psraw",
"psrld", "psrlq", "psrlw", "psubb", "psubd", "psubsb",
"psubsiw", "psubsw", "psubusb", "psubusw", "psubw", "punpckhbw",
"punpckhdq", "punpckhwd", "punpcklbw", "punpckldq", "punpcklwd",
"push", "pusha", "pushad", "pushaw", "pushf", "pushfd",
"pushfw", "pxor", "rcl", "rcr", "rdmsr", "rdpmc", "rdtsc",
"resb", "resd", "resq", "rest", "resw", "ret", "retf", "retn",
"rol", "ror", "rsm", "sahf", "sal", "salc", "sar", "sbb",
"scasb", "scasd", "scasw", "sgdt", "shl", "shld", "shr", "shrd",
"sidt", "sldt", "smi", "smsw", "stc", "std", "sti", "stosb",
"stosd", "stosw", "str", "sub", "test", "umov", "verr", "verw",
"wait", "wbinvd", "wrmsr", "xadd", "xbts", "xchg", "xlatb",
"xor"
};
static char *icn[] = { /* conditional instructions */
"cmov", "j", "set"
};
static int ico[] = { /* and the corresponding opcodes */
I_CMOVcc, I_Jcc, I_SETcc
};
static char *conditions[] = { /* condition code names */
"a", "ae", "b", "be", "c", "e", "g", "ge", "l", "le", "na", "nae",
"nb", "nbe", "nc", "ne", "ng", "nge", "nl", "nle", "no", "np",
"ns", "nz", "o", "p", "pe", "po", "s", "z"
};
/* Instruction names automatically generated from insns.dat */
#include "insnsn.c"

68
nasm.h
View file

@ -426,67 +426,15 @@ enum { /* register names */
R_ST6, R_ST7, R_TR3, R_TR4, R_TR5, R_TR6, R_TR7, REG_ENUM_LIMIT
};
enum { /* instruction names */
I_AAA, I_AAD, I_AAM, I_AAS, I_ADC, I_ADD, I_AND, I_ARPL,
I_BOUND, I_BSF, I_BSR, I_BSWAP, I_BT, I_BTC, I_BTR, I_BTS,
I_CALL, I_CBW, I_CDQ, I_CLC, I_CLD, I_CLI, I_CLTS, I_CMC, I_CMP,
I_CMPSB, I_CMPSD, I_CMPSW, I_CMPXCHG, I_CMPXCHG486, I_CMPXCHG8B,
I_CPUID, I_CWD, I_CWDE, I_DAA, I_DAS, I_DB, I_DD, I_DEC, I_DIV,
I_DQ, I_DT, I_DW, I_EMMS, I_ENTER, I_EQU, I_F2XM1, I_FABS,
I_FADD, I_FADDP, I_FBLD, I_FBSTP, I_FCHS, I_FCLEX, I_FCMOVB,
I_FCMOVBE, I_FCMOVE, I_FCMOVNB, I_FCMOVNBE, I_FCMOVNE,
I_FCMOVNU, I_FCMOVU, I_FCOM, I_FCOMI, I_FCOMIP, I_FCOMP,
I_FCOMPP, I_FCOS, I_FDECSTP, I_FDISI, I_FDIV, I_FDIVP, I_FDIVR,
I_FDIVRP,
I_FEMMS,
I_FENI, I_FFREE, I_FIADD, I_FICOM, I_FICOMP, I_FIDIV,
I_FIDIVR, I_FILD, I_FIMUL, I_FINCSTP, I_FINIT, I_FIST, I_FISTP,
I_FISUB, I_FISUBR, I_FLD, I_FLD1, I_FLDCW, I_FLDENV, I_FLDL2E,
I_FLDL2T, I_FLDLG2, I_FLDLN2, I_FLDPI, I_FLDZ, I_FMUL, I_FMULP,
I_FNCLEX, I_FNDISI, I_FNENI, I_FNINIT, I_FNOP, I_FNSAVE,
I_FNSTCW, I_FNSTENV, I_FNSTSW, I_FPATAN, I_FPREM, I_FPREM1,
I_FPTAN, I_FRNDINT, I_FRSTOR, I_FSAVE, I_FSCALE, I_FSETPM,
I_FSIN, I_FSINCOS, I_FSQRT, I_FST, I_FSTCW, I_FSTENV, I_FSTP,
I_FSTSW, I_FSUB, I_FSUBP, I_FSUBR, I_FSUBRP, I_FTST, I_FUCOM,
I_FUCOMI, I_FUCOMIP, I_FUCOMP, I_FUCOMPP, I_FXAM, I_FXCH,
I_FXTRACT, I_FYL2X, I_FYL2XP1, I_HLT, I_IBTS, I_ICEBP, I_IDIV,
I_IMUL, I_IN, I_INC, I_INCBIN, I_INSB, I_INSD, I_INSW, I_INT,
I_INT01, I_INT1, I_INT3, I_INTO, I_INVD, I_INVLPG, I_IRET,
I_IRETD, I_IRETW, I_JCXZ, I_JECXZ, I_JMP, I_LAHF, I_LAR, I_LDS,
I_LEA, I_LEAVE, I_LES, I_LFS, I_LGDT, I_LGS, I_LIDT, I_LLDT,
I_LMSW, I_LOADALL, I_LOADALL286, I_LODSB, I_LODSD, I_LODSW,
I_LOOP, I_LOOPE, I_LOOPNE, I_LOOPNZ, I_LOOPZ, I_LSL, I_LSS,
I_LTR, I_MOV, I_MOVD, I_MOVQ, I_MOVSB, I_MOVSD, I_MOVSW,
I_MOVSX, I_MOVZX, I_MUL, I_NEG, I_NOP, I_NOT, I_OR, I_OUT,
I_OUTSB, I_OUTSD, I_OUTSW, I_PACKSSDW, I_PACKSSWB, I_PACKUSWB,
I_PADDB, I_PADDD, I_PADDSB, I_PADDSIW, I_PADDSW, I_PADDUSB,
I_PADDUSW, I_PADDW, I_PAND, I_PANDN, I_PAVEB,
I_PAVGUSB, I_PCMPEQB,
I_PCMPEQD, I_PCMPEQW, I_PCMPGTB, I_PCMPGTD, I_PCMPGTW,
I_PDISTIB,
I_PF2ID, I_PFACC, I_PFADD, I_PFCMPEQ, I_PFCMPGE, I_PFCMPGT,
I_PFMAX, I_PFMIN, I_PFMUL, I_PFRCP, I_PFRCPIT1, I_PFRCPIT2,
I_PFRSQIT1, I_PFRSQRT, I_PFSUB, I_PFSUBR, I_PI2FD,
I_PMACHRIW, I_PMADDWD, I_PMAGW, I_PMULHRIW, I_PMULHRWA,
I_PMULHRWC, I_PMULHW, I_PMULLW, I_PMVGEZB, I_PMVLZB, I_PMVNZB,
I_PMVZB, I_POP, I_POPA, I_POPAD, I_POPAW, I_POPF, I_POPFD,
I_POPFW, I_POR, I_PREFETCH, I_PREFETCHW,
I_PSLLD, I_PSLLQ, I_PSLLW, I_PSRAD, I_PSRAW,
I_PSRLD, I_PSRLQ, I_PSRLW, I_PSUBB, I_PSUBD, I_PSUBSB,
I_PSUBSIW, I_PSUBSW, I_PSUBUSB, I_PSUBUSW, I_PSUBW, I_PUNPCKHBW,
I_PUNPCKHDQ, I_PUNPCKHWD, I_PUNPCKLBW, I_PUNPCKLDQ, I_PUNPCKLWD,
I_PUSH, I_PUSHA, I_PUSHAD, I_PUSHAW, I_PUSHF, I_PUSHFD,
I_PUSHFW, I_PXOR, I_RCL, I_RCR, I_RDMSR, I_RDPMC, I_RDTSC,
I_RESB, I_RESD, I_RESQ, I_REST, I_RESW, I_RET, I_RETF, I_RETN,
I_ROL, I_ROR, I_RSM, I_SAHF, I_SAL, I_SALC, I_SAR, I_SBB,
I_SCASB, I_SCASD, I_SCASW, I_SGDT, I_SHL, I_SHLD, I_SHR, I_SHRD,
I_SIDT, I_SLDT, I_SMI, I_SMSW, I_STC, I_STD, I_STI, I_STOSB,
I_STOSD, I_STOSW, I_STR, I_SUB, I_TEST, I_UMOV, I_VERR, I_VERW,
I_WAIT, I_WBINVD, I_WRMSR, I_XADD, I_XBTS, I_XCHG, I_XLATB,
I_XOR, I_CMOVcc, I_Jcc, I_SETcc
};
/* Instruction names automatically generated from insns.dat */
#include "insnsi.h"
#define MAX_KEYWORD 9 /* max length of any instruction, register name etc. */
/* max length of any instruction, register name etc. */
#if MAX_INSLEN > 9
#define MAX_KEYWORD MAX_INSLEN
#else
#define MAX_KEYWORD 9
#endif
enum { /* condition code names */
C_A, C_AE, C_B, C_BE, C_C, C_E, C_G, C_GE, C_L, C_LE, C_NA, C_NAE,