insns.dat: fix accidentally duplicated patterns
Some patterns were accidentally duplicated during the conversion of the X64 marker. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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H. Peter Anvin
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66a0dd460c
1 changed files with 0 additions and 28 deletions
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@ -2039,7 +2039,6 @@ PCMPGTQ xmmreg,xmmrm [rm: 66 0f 38 37 /r] SSE42
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POPCNT reg16,rm16 [rm: o16 f3i 0f b8 /r] NEHALEM,SW
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POPCNT reg32,rm32 [rm: o32 f3i 0f b8 /r] NEHALEM,SD
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POPCNT reg64,rm64 [rm: o64 f3i 0f b8 /r] NEHALEM,SQ,LONG
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POPCNT reg64,rm64 [rm: o64 f3i 0f b8 /r] NEHALEM,SQ,LONG
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;# Intel SMX
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GETSEC void [ 0f 37] KATMAI
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@ -5815,15 +5814,11 @@ VXORPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.nds.512.0f.w0
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;# Intel memory protection keys for userspace (PKU aka PKEYs)
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RDPKRU void [ 0f 01 ee] LONG,FUTURE
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RDPKRU void [ 0f 01 ee] LONG,FUTURE
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WRPKRU void [ 0f 01 ef] LONG,FUTURE
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WRPKRU void [ 0f 01 ef] LONG,FUTURE
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;# Read Processor ID
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RDPID reg32 [m: f3 0f c7 /7] NOLONG,FUTURE
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RDPID reg64 [m: o64nw f3 0f c7 /7] LONG,FUTURE
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RDPID reg64 [m: o64nw f3 0f c7 /7] LONG,FUTURE
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RDPID reg32 [m: f3 0f c7 /7] LONG,UNDOC,FUTURE
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RDPID reg32 [m: f3 0f c7 /7] LONG,UNDOC,FUTURE
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;# New memory instructions
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@ -5837,30 +5832,25 @@ CLZERO void [ 0f 01 fc] FUTURE,AMD
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CLZERO reg_ax [-: a16 0f 01 fc] FUTURE,AMD,ND,NOLONG
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CLZERO reg_eax [-: a32 0f 01 fc] FUTURE,AMD,ND
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CLZERO reg_rax [-: a64 0f 01 fc] FUTURE,AMD,ND,LONG
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CLZERO reg_rax [-: a64 0f 01 fc] FUTURE,AMD,ND,LONG
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;# Processor trace write
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PTWRITE rm32 [m: np 0f ae /4] FUTURE
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PTWRITE rm64 [m: o64 np 0f ae /4] LONG,FUTURE
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PTWRITE rm64 [m: o64 np 0f ae /4] LONG,FUTURE
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;# Instructions from the Intel Instruction Set Extensions,
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;# doc 319433-034 May 2018
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CLDEMOTE mem [m: np 0f 1c /0] FUTURE
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MOVDIRI mem32,reg32 [mr: np 0f 38 f9 /r] FUTURE,SD
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MOVDIRI mem64,reg64 [mr: o64 0f 38 f9 /r] FUTURE,LONG,SQ
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MOVDIRI mem64,reg64 [mr: o64 0f 38 f9 /r] FUTURE,LONG,SQ
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MOVDIR64B reg16,mem512 [rm: a16 66 0f 38 f8 /r] FUTURE,NOLONG
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MOVDIR64B reg32,mem512 [rm: a32 66 0f 38 f8 /r] FUTURE
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MOVDIR64B reg64,mem512 [rm: o64nw a64 66 0f 38 f8 /r] FUTURE,LONG
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MOVDIR64B reg64,mem512 [rm: o64nw a64 66 0f 38 f8 /r] FUTURE,LONG
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PCONFIG void [ np 0f 01 c5] FUTURE
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TPAUSE reg32 [m: 66 0f ae /6] FUTURE
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TPAUSE reg32,reg_edx,reg_eax [m--: 66 0f ae /6] FUTURE,ND
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UMONITOR reg16 [m: a16 f3 0f ae /6] FUTURE,NOLONG
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UMONITOR reg32 [m: a32 f3 0f ae /6] FUTURE
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UMONITOR reg64 [m: o64nw a64 f3 0f ae /6] FUTURE,LONG
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UMONITOR reg64 [m: o64nw a64 f3 0f ae /6] FUTURE,LONG
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UMWAIT reg32 [m: f2 0f ae /6] FUTURE
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UMWAIT reg32,reg_edx,reg_eax [m--: f2 0f ae /6] FUTURE,ND
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WBNOINVD void [ f3 0f 09] FUTURE
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@ -5999,31 +5989,25 @@ ENDBR32 void [ f3 0f 1e fb] CET,FUTURE
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ENDBR64 void [ f3 0f 1e fa] CET,FUTURE
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INCSSPD reg32 [m: o32 f3 0f ae /5] CET,FUTURE
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INCSSPQ reg64 [m: o64 f3 0f ae /5] CET,FUTURE,LONG
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INCSSPQ reg64 [m: o64 f3 0f ae /5] CET,FUTURE,LONG
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RDSSPD reg32 [m: o32 f3 0f 1e /1] CET,FUTURE
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RDSSPQ reg64 [m: o64 f3 0f 1e /1] CET,FUTURE,LONG
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RDSSPQ reg64 [m: o64 f3 0f 1e /1] CET,FUTURE,LONG
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RSTORSSP mem64 [m: f3 0f 01 /5] CET,FUTURE
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SAVEPREVSSP void [ f3 0f 01 ea] CET,FUTURE
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SETSSBSY void [ f3 0f 01 e8] CET,FUTURE
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WRUSSD mem,reg32 [mr: o32 66 0f 38 f5 /r] CET,FUTURE
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WRUSSQ mem,reg64 [mr: o64 66 0f 38 f5 /r] CET,FUTURE,LONG
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WRUSSQ mem,reg64 [mr: o64 66 0f 38 f5 /r] CET,FUTURE,LONG
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WRSSD mem,reg32 [mr: o32 0f 38 f6 /r] CET,FUTURE
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WRSSQ mem,reg64 [mr: o64 0f 38 f6 /r] CET,FUTURE,LONG
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WRSSQ mem,reg64 [mr: o64 0f 38 f6 /r] CET,FUTURE,LONG
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;# Instructions from ISE doc 319433-040, June 2020
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ENQCMD reg16,mem512 [rm: a16 f2 0f 38 f8 /r] ENQCMD,FUTURE
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ENQCMD reg32,mem512 [rm: a16 f2 0f 38 f8 /r] ENQCMD,FUTURE,ND
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ENQCMD reg32,mem512 [rm: a32 f2 0f 38 f8 /r] ENQCMD,FUTURE
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ENQCMD reg64,mem512 [rm: a64 f2 0f 38 f8 /r] ENQCMD,FUTURE,LONG
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ENQCMD reg64,mem512 [rm: a64 f2 0f 38 f8 /r] ENQCMD,FUTURE,LONG
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ENQCMDS reg16,mem512 [rm: a16 f2 0f 38 f8 /r] ENQCMD,FUTURE,PRIV
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ENQCMDS reg32,mem512 [rm: a16 f2 0f 38 f8 /r] ENQCMD,FUTURE,PRIV,ND
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ENQCMDS reg32,mem512 [rm: a32 f2 0f 38 f8 /r] ENQCMD,FUTURE,PRIV
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ENQCMDS reg64,mem512 [rm: a64 f2 0f 38 f8 /r] ENQCMD,FUTURE,PRIV,LONG
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ENQCMDS reg64,mem512 [rm: a64 f2 0f 38 f8 /r] ENQCMD,FUTURE,PRIV,LONG
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PCONFIG void [ np 0f 01 c5] PCONFIG,FUTURE,PRIV
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SERIALIZE void [ np 0f 01 e8] SERIALIZE,FUTURE
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WBNOINVD void [ f3 0f 09] WBNOINVD,FUTURE,PRIV
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@ -6048,28 +6032,16 @@ VP2INTERSECTD kreg|rs2,zmmreg,zmmrm128|b32 [rvm:fv: evex.nds.512.f2.0f38.w0 68
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;# Intel Advanced Matrix Extensions (AMX)
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LDTILECFG mem512 [m: vex.128.np.0f38.w0 49 /0] AMXTILE,FUTURE,SZ,LONG
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LDTILECFG mem512 [m: vex.128.np.0f38.w0 49 /0] AMXTILE,FUTURE,SZ,LONG
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STTILECFG mem512 [m: vex.128.66.0f38.w0 49 /0] AMXTILE,FUTURE,SZ,LONG
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STTILECFG mem512 [m: vex.128.66.0f38.w0 49 /0] AMXTILE,FUTURE,SZ,LONG
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TDPBF16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 5c /r] AMXBF16,FUTURE,LONG
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TDPBF16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 5c /r] AMXBF16,FUTURE,LONG
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TDPBSSD tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 5e /r] AMXINT8,FUTURE,LONG
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TDPBSSD tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 5e /r] AMXINT8,FUTURE,LONG
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TDPBSUD tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 5e /r] AMXINT8,FUTURE,LONG
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TDPBSUD tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 5e /r] AMXINT8,FUTURE,LONG
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TDPBUSD tmmreg,tmmreg,tmmreg [rmv: vex.128.66.0f38.w0 5e /r] AMXINT8,FUTURE,LONG
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TDPBUSD tmmreg,tmmreg,tmmreg [rmv: vex.128.66.0f38.w0 5e /r] AMXINT8,FUTURE,LONG
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TDPBUUD tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 5e /r] AMXINT8,FUTURE,LONG
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TDPBUUD tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 5e /r] AMXINT8,FUTURE,LONG
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TILELOADD tmmreg,mem [rm: vex.128.f2.0f38.w0 4b /r] AMXTILE,MIB,FUTURE,SX,LONG
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TILELOADD tmmreg,mem [rm: vex.128.f2.0f38.w0 4b /r] AMXTILE,MIB,FUTURE,SX,LONG
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TILELOADDT1 tmmreg,mem [rm: vex.128.f2.0f38.w0 4b /r] AMXTILE,MIB,FUTURE,SX,LONG
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TILELOADDT1 tmmreg,mem [rm: vex.128.f2.0f38.w0 4b /r] AMXTILE,MIB,FUTURE,SX,LONG
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TILERELEASE void [ vex.128.np.0f38.w0 49 c0] AMXTILE,FUTURE,LONG
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TILERELEASE void [ vex.128.np.0f38.w0 49 c0] AMXTILE,FUTURE,LONG
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TILESTORED mem,tmmreg [mr: vex.128.f3.0f38.w0 4b /r] AMXTILE,MIB,FUTURE,SX,LONG
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TILESTORED mem,tmmreg [mr: vex.128.f3.0f38.w0 4b /r] AMXTILE,MIB,FUTURE,SX,LONG
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TILEZERO tmmreg [r: vex.128.f2.0f38.w0 49 /3r0] AMXTILE,FUTURE,LONG
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TILEZERO tmmreg [r: vex.128.f2.0f38.w0 49 /3r0] AMXTILE,FUTURE,LONG
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;# Systematic names for the hinting nop instructions
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