Add IS_SREG and IS_FSGS helpers

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
This commit is contained in:
Cyrill Gorcunov 2011-08-28 18:49:00 +04:00
parent 447e20cf96
commit 5abbe375cf
2 changed files with 14 additions and 9 deletions

View file

@ -164,6 +164,9 @@ typedef uint32_t opflags_t;
#define is_class(class, op) (!((opflags_t)(class) & ~(opflags_t)(op)))
#define IS_SREG(op) is_class(REG_SREG, nasm_reg_flags[(op)])
#define IS_FSGS(op) is_class(REG_FSGS, nasm_reg_flags[(op)])
/* Register classes */
#define REG_EA 0x00009000U /* 'normal' reg, qualifies as EA */
#define RM_GPR 0x00208000U /* integer operand */

View file

@ -218,10 +218,12 @@ restart_parse:
return result;
}
if (i != TOKEN_ID && i != TOKEN_INSN && i != TOKEN_PREFIX &&
(i != TOKEN_REG || (REG_SREG & ~nasm_reg_flags[tokval.t_integer]))) {
nasm_error(ERR_NONFATAL, "label or instruction expected"
" at start of line");
if (i != TOKEN_ID &&
i != TOKEN_INSN &&
i != TOKEN_PREFIX &&
(i != TOKEN_REG || !IS_SREG(tokval.t_integer))) {
nasm_error(ERR_NONFATAL,
"label or instruction expected at start of line");
result->opcode = I_none;
return result;
}
@ -261,8 +263,7 @@ restart_parse:
result->times = 1L;
while (i == TOKEN_PREFIX ||
(i == TOKEN_REG && !(REG_SREG & ~nasm_reg_flags[tokval.t_integer])))
{
(i == TOKEN_REG && IS_SREG(tokval.t_integer))) {
first = false;
/*
@ -661,15 +662,16 @@ is_expression:
/*
* Process the segment override.
*/
if (value[1].type != 0 || value->value != 1 ||
REG_SREG & ~nasm_reg_flags[value->type])
if (value[1].type != 0 ||
value->value != 1 ||
!IS_SREG(value->type))
nasm_error(ERR_NONFATAL, "invalid segment override");
else if (result->prefixes[PPS_SEG])
nasm_error(ERR_NONFATAL,
"instruction has conflicting segment overrides");
else {
result->prefixes[PPS_SEG] = value->type;
if (!(REG_FSGS & ~nasm_reg_flags[value->type]))
if (IS_FSGS(value->type))
result->oprs[operand].eaflags |= EAF_FSGS;
}