iflag: Fix dependencies, factor out static components of iflag.h
Multi-dependencies don't work as expected, especially not across Make versions, this is why we don't use them and read the instructions list multiple times. iflag.h has a lot of static content, so factor out the static content. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This commit is contained in:
H. Peter Anvin
parent
015774dc3f
commit
45a22d9a61
5 changed files with 223 additions and 216 deletions
2
.gitignore
vendored
2
.gitignore
vendored
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@ -79,4 +79,4 @@ TAGS
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/version.nsh
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/version.sed
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/iflag.c
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/iflag.h
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/iflaggen.h
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21
Makefile.in
21
Makefile.in
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@ -110,20 +110,21 @@ ndisasm$(X): $(NDISASM) $(XOBJS)
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# instruction-table file by a Perl script. They're distributed,
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# though, so it isn't necessary to have Perl just to recompile NASM
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# from the distribution.
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INSDEP = insns.dat insns.pl insns-iflags.pl
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insns.pl: insns-iflags.pl
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iflag.c iflag.h: insns.dat insns.pl
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$(PERL) $(srcdir)/insns.pl -t $(srcdir)/insns.dat
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insnsb.c: insns.dat insns.pl
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iflag.c: $(INSDEP)
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$(PERL) $(srcdir)/insns.pl -fc $(srcdir)/insns.dat
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iflaggen.h: $(INSDEP)
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$(PERL) $(srcdir)/insns.pl -fh $(srcdir)/insns.dat
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insnsb.c: $(INSDEP)
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$(PERL) $(srcdir)/insns.pl -b $(srcdir)/insns.dat
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insnsa.c: insns.dat insns.pl
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insnsa.c: $(INSDEP)
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$(PERL) $(srcdir)/insns.pl -a $(srcdir)/insns.dat
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insnsd.c: insns.dat insns.pl
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insnsd.c: $(INSDEP)
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$(PERL) $(srcdir)/insns.pl -d $(srcdir)/insns.dat
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insnsi.h: insns.dat insns.pl
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insnsi.h: $(INSDEP)
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$(PERL) $(srcdir)/insns.pl -i $(srcdir)/insns.dat
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insnsn.c: insns.dat insns.pl
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insnsn.c: $(INSDEP)
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$(PERL) $(srcdir)/insns.pl -n $(srcdir)/insns.dat
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# These files contains all the standard macros that are derived from
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@ -193,7 +194,7 @@ PERLREQ = macros.c insnsb.c insnsa.c insnsd.c insnsi.h insnsn.c \
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tokhash.c tokens.h pptok.h pptok.c pptok.ph \
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directiv.c directiv.h \
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version.h version.mac version.mak version.nsh \
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iflag.c iflag.h
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iflag.c iflaggen.h
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perlreq: $(PERLREQ)
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# Generated manpages, also pregenerated for distribution
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193
iflag.h
Normal file
193
iflag.h
Normal file
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@ -0,0 +1,193 @@
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#ifndef NASM_IFLAG_H
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#define NASM_IFLAG_H
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#include <inttypes.h>
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#include <string.h>
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#include "compiler.h"
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int ilog2_32(uint32_t v);
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/*
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* Instruction template flags. These specify which processor
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* targets the instruction is eligible for, whether it is
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* privileged or undocumented, and also specify extra error
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* checking on the matching of the instruction.
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*
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* IF_SM stands for Size Match: any operand whose size is not
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* explicitly specified by the template is `really' intended to be
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* the same size as the first size-specified operand.
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* Non-specification is tolerated in the input instruction, but
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* _wrong_ specification is not.
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*
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* IF_SM2 invokes Size Match on only the first _two_ operands, for
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* three-operand instructions such as SHLD: it implies that the
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* first two operands must match in size, but that the third is
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* required to be _unspecified_.
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*
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* IF_SB invokes Size Byte: operands with unspecified size in the
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* template are really bytes, and so no non-byte specification in
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* the input instruction will be tolerated. IF_SW similarly invokes
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* Size Word, and IF_SD invokes Size Doubleword.
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*
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* (The default state if neither IF_SM nor IF_SM2 is specified is
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* that any operand with unspecified size in the template is
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* required to have unspecified size in the instruction too...)
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*
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* iflag_t is defined to store these flags.
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*/
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typedef struct {
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uint32_t field[4];
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} iflag_t;
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#include "iflaggen.h"
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#define IF_GENBIT(bit) (UINT32_C(1) << (bit))
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static inline unsigned int iflag_test(iflag_t *f,unsigned int bit)
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{
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unsigned int index = bit / 32;
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return f->field[index] & (UINT32_C(1) << (bit - (index * 32)));
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}
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static inline void iflag_set(iflag_t *f, unsigned int bit)
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{
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unsigned int index = bit / 32;
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f->field[index] |= (UINT32_C(1) << (bit - (index * 32)));
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}
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static inline void iflag_clear(iflag_t *f, unsigned int bit)
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{
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unsigned int index = bit / 32;
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f->field[index] &= ~(UINT32_C(1) << (bit - (index * 32)));
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}
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static inline void iflag_clear_all(iflag_t *f)
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{
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memset(f, 0, sizeof(*f));
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}
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static inline void iflag_set_all(iflag_t *f)
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{
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memset(f, 0xff, sizeof(*f));
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}
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static inline int iflag_cmp(iflag_t *a, iflag_t *b)
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{
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unsigned int i;
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for (i = 0; i < sizeof(a->field) / sizeof(a->field[0]); i++) {
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if (a->field[i] < b->field[i])
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return -1;
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else if (a->field[i] > b->field[i])
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return 1;
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}
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return 0;
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}
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static inline int iflag_cmp_cpu(iflag_t *a, iflag_t *b)
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{
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if (a->field[3] < b->field[3])
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return -1;
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else if (a->field[3] > b->field[3])
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return 1;
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return 0;
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}
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static inline unsigned int iflag_ffs(iflag_t *a)
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{
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unsigned int i;
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for (i = 0; i < sizeof(a->field) / sizeof(a->field[0]); i++) {
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if (a->field[i])
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return ilog2_32(a->field[i]) + (i * 32);
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}
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return 0;
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}
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#define IF_GEN_HELPER(name, op) \
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static inline iflag_t iflag_##name(iflag_t *a, iflag_t *b) \
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{ \
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unsigned int i; \
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iflag_t res; \
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\
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for (i = 0; i < sizeof(a->field) / sizeof(a->field[0]); i++) \
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res.field[i] = a->field[i] op b->field[i]; \
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\
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return res; \
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}
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IF_GEN_HELPER(xor, ^)
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/* Use this helper to test instruction template flags */
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#define itemp_has(itemp, bit) iflag_test(&insns_flags[(itemp)->iflag_idx], bit)
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/* Maximum processor level at moment */
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#define IF_PLEVEL IF_IA64
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/* Some helpers which are to work with predefined masks */
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#define IF_SMASK \
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(IF_GENBIT(IF_SB) |\
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IF_GENBIT(IF_SW) |\
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IF_GENBIT(IF_SD) |\
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IF_GENBIT(IF_SQ) |\
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IF_GENBIT(IF_SO) |\
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IF_GENBIT(IF_SY) |\
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IF_GENBIT(IF_SZ) |\
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IF_GENBIT(IF_SIZE))
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#define IF_ARMASK \
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(IF_GENBIT(IF_AR0) |\
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IF_GENBIT(IF_AR1) |\
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IF_GENBIT(IF_AR2) |\
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IF_GENBIT(IF_AR3) |\
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IF_GENBIT(IF_AR4))
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#define __itemp_smask(idx) (insns_flags[(idx)].field[0] & IF_SMASK)
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#define __itemp_armask(idx) (insns_flags[(idx)].field[0] & IF_ARMASK)
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#define __itemp_arg(idx) ((__itemp_armask(idx) >> IF_AR0) - 1)
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#define itemp_smask(itemp) __itemp_smask((itemp)->iflag_idx)
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#define itemp_arg(itemp) __itemp_arg((itemp)->iflag_idx)
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#define itemp_armask(itemp) __itemp_armask((itemp)->iflag_idx)
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static inline int iflag_cmp_cpu_level(iflag_t *a, iflag_t *b)
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{
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iflag_t v1 = *a;
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iflag_t v2 = *b;
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iflag_clear(&v1, IF_CYRIX);
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iflag_clear(&v1, IF_AMD);
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iflag_clear(&v2, IF_CYRIX);
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iflag_clear(&v2, IF_AMD);
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if (v1.field[3] < v2.field[3])
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return -1;
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else if (v1.field[3] > v2.field[3])
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return 1;
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return 0;
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}
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static inline iflag_t __iflag_pfmask(iflag_t *a)
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{
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iflag_t r = (iflag_t) {
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.field[1] = a->field[1],
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.field[2] = a->field[2],
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};
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if (iflag_test(a, IF_CYRIX))
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iflag_set(&r, IF_CYRIX);
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if (iflag_test(a, IF_AMD))
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iflag_set(&r, IF_AMD);
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return r;
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}
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#define iflag_pfmask(itemp) __iflag_pfmask(&insns_flags[(itemp)->iflag_idx])
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#endif /* NASM_IFLAG_H__ */
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213
insns-iflags.pl
213
insns-iflags.pl
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@ -178,220 +178,29 @@ sub insns_flag_index(@) {
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return $insns_flag_hash{$key};
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}
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sub write_iflags() {
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print STDERR "Writing iflag.h ...\n";
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sub write_iflaggen_h() {
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print STDERR "Writing iflaggen.h ...\n";
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open N, ">iflag.h";
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open(N, ">iflaggen.h") or die "$0: $!\n";
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print N "/* This file is auto-generated. Don't edit. */\n";
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print N "#ifndef NASM_IFLAG_H__\n";
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print N "#define NASM_IFLAG_H__\n\n";
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print N "#ifndef NASM_IFLAGGEN_H\n";
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print N "#define NASM_IFLAGGEN_H 1\n\n";
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print N "#include <inttypes.h>\n\n";
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print N "#include <string.h>\n\n";
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print N "#include \"compiler.h\"\n";
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print N "extern int ilog2_32(uint32_t v);\n\n";
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print N "/*\n";
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print N " * Instruction template flags. These specify which processor\n";
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print N " * targets the instruction is eligible for, whether it is\n";
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print N " * privileged or undocumented, and also specify extra error\n";
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print N " * checking on the matching of the instruction.\n";
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print N " *\n";
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print N " * IF_SM stands for Size Match: any operand whose size is not\n";
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print N " * explicitly specified by the template is `really' intended to be\n";
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print N " * the same size as the first size-specified operand.\n";
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print N " * Non-specification is tolerated in the input instruction, but\n";
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print N " * _wrong_ specification is not.\n";
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print N " *\n";
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print N " * IF_SM2 invokes Size Match on only the first _two_ operands, for\n";
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print N " * three-operand instructions such as SHLD: it implies that the\n";
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print N " * first two operands must match in size, but that the third is\n";
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print N " * required to be _unspecified_.\n";
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print N " *\n";
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print N " * IF_SB invokes Size Byte: operands with unspecified size in the\n";
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print N " * template are really bytes, and so no non-byte specification in\n";
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print N " * the input instruction will be tolerated. IF_SW similarly invokes\n";
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print N " * Size Word, and IF_SD invokes Size Doubleword.\n";
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print N " *\n";
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print N " * (The default state if neither IF_SM nor IF_SM2 is specified is\n";
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print N " * that any operand with unspecified size in the template is\n";
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print N " * required to have unspecified size in the instruction too...)\n";
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print N " *\n";
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print N " * iflag_t is defined to store these flags.\n";
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print N " */\n";
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foreach my $key (sort { $insns_flag_bit{$a}[0] <=> $insns_flag_bit{$b}[0] } keys(%insns_flag_bit)) {
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print N sprintf("#define IF_%-16s (%3d) /* %-64s */\n",
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print N sprintf("#define IF_%-16s %3d /* %-64s */\n",
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$key, $insns_flag_bit{$key}[0], $insns_flag_bit{$key}[1]);
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}
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print N "\n";
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print N "typedef struct {\n";
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print N " uint32_t field[4];\n";
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print N "} iflag_t;\n\n";
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print N sprintf("extern iflag_t insns_flags[%d];\n\n",
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$#insns_flag_values + 1);
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print N "\n";
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print N sprintf("extern iflag_t insns_flags[%d];\n\n", $#insns_flag_values + 1);
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print N "#define IF_GENBIT(bit) (UINT32_C(1) << (bit))\n\n";
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print N "static inline unsigned int iflag_test(iflag_t *f,unsigned int bit)\n";
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print N "{\n";
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print N " unsigned int index = bit / 32;\n";
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print N " return f->field[index] & (UINT32_C(1) << (bit - (index * 32)));\n";
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print N "}\n\n";
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print N "static inline void iflag_set(iflag_t *f, unsigned int bit)\n";
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print N "{\n";
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print N " unsigned int index = bit / 32;\n";
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print N " f->field[index] |= (UINT32_C(1) << (bit - (index * 32)));\n";
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print N "}\n\n";
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print N "static inline void iflag_clear(iflag_t *f, unsigned int bit)\n";
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print N "{\n";
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print N " unsigned int index = bit / 32;\n";
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print N " f->field[index] &= ~(UINT32_C(1) << (bit - (index * 32)));\n";
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print N "}\n\n";
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print N "static inline void iflag_clear_all(iflag_t *f)\n";
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print N "{\n";
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print N " memset(f, 0, sizeof(*f));\n";
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print N "}\n\n";
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print N "static inline void iflag_set_all(iflag_t *f)\n";
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print N "{\n";
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print N " memset(f, 0xff, sizeof(*f));\n";
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print N "}\n\n";
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print N "static inline int iflag_cmp(iflag_t *a, iflag_t *b)\n";
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print N "{\n";
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print N " unsigned int i;\n";
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print N "\n";
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print N " for (i = 0; i < sizeof(a->field) / sizeof(a->field[0]); i++) {\n";
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print N " if (a->field[i] < b->field[i])\n";
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print N " return -1;\n";
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print N " else if (a->field[i] > b->field[i])\n";
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print N " return 1;\n";
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print N " }\n";
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print N "\n";
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print N " return 0;\n";
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print N "}\n\n";
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print N "static inline int iflag_cmp_cpu(iflag_t *a, iflag_t *b)\n";
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print N "{\n";
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print N " if (a->field[3] < b->field[3])\n";
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print N " return -1;\n";
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print N " else if (a->field[3] > b->field[3])\n";
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print N " return 1;\n";
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print N " return 0;\n";
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print N "}\n\n";
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print N "static inline unsigned int iflag_ffs(iflag_t *a)\n";
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print N "{\n";
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print N " unsigned int i;\n";
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print N "\n";
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print N " for (i = 0; i < sizeof(a->field) / sizeof(a->field[0]); i++) {\n";
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print N " if (a->field[i])\n";
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print N " return ilog2_32(a->field[i]) + (i * 32);\n";
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print N " }\n";
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print N "\n";
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print N " return 0;\n";
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print N "}\n\n";
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print N "#define IF_GEN_HELPER(name, op) \\\n";
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print N " static inline iflag_t iflag_##name(iflag_t *a, iflag_t *b) \\\n";
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print N " { \\\n";
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print N " unsigned int i; \\\n";
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print N " iflag_t res; \\\n";
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print N " \\\n";
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print N " for (i = 0; i < sizeof(a->field) / sizeof(a->field[0]); i++) \\\n";
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print N " res.field[i] = a->field[i] op b->field[i]; \\\n";
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print N " \\\n";
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print N " return res; \\\n";
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print N " }\n";
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print N "\n";
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print N "IF_GEN_HELPER(xor, ^)\n";
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print N "\n\n";
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print N "/* Use this helper to test instruction template flags */\n";
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print N "#define itemp_has(itemp, bit) iflag_test(&insns_flags[(itemp)->iflag_idx], bit)\n\n";
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print N "\n";
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print N "/* Maximum processor level at moment */\n";
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print N "#define IF_PLEVEL IF_IA64\n";
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print N "/* Some helpers which are to work with predefined masks */\n";
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print N "#define IF_SMASK \\\n";
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print N " (IF_GENBIT(IF_SB) |\\\n";
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print N " IF_GENBIT(IF_SW) |\\\n";
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print N " IF_GENBIT(IF_SD) |\\\n";
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print N " IF_GENBIT(IF_SQ) |\\\n";
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print N " IF_GENBIT(IF_SO) |\\\n";
|
||||
print N " IF_GENBIT(IF_SY) |\\\n";
|
||||
print N " IF_GENBIT(IF_SZ) |\\\n";
|
||||
print N " IF_GENBIT(IF_SIZE))\n";
|
||||
print N "#define IF_ARMASK \\\n";
|
||||
print N " (IF_GENBIT(IF_AR0) |\\\n";
|
||||
print N " IF_GENBIT(IF_AR1) |\\\n";
|
||||
print N " IF_GENBIT(IF_AR2) |\\\n";
|
||||
print N " IF_GENBIT(IF_AR3) |\\\n";
|
||||
print N " IF_GENBIT(IF_AR4))\n";
|
||||
|
||||
print N "\n";
|
||||
print N "#define __itemp_smask(idx) (insns_flags[(idx)].field[0] & IF_SMASK)\n";
|
||||
print N "#define __itemp_armask(idx) (insns_flags[(idx)].field[0] & IF_ARMASK)\n";
|
||||
print N "#define __itemp_arg(idx) ((__itemp_armask(idx) >> IF_AR0) - 1)\n";
|
||||
print N "\n";
|
||||
print N "#define itemp_smask(itemp) __itemp_smask((itemp)->iflag_idx)\n";
|
||||
print N "#define itemp_arg(itemp) __itemp_arg((itemp)->iflag_idx)\n";
|
||||
print N "#define itemp_armask(itemp) __itemp_armask((itemp)->iflag_idx)\n";
|
||||
|
||||
print N "\n";
|
||||
print N "static inline int iflag_cmp_cpu_level(iflag_t *a, iflag_t *b)\n";
|
||||
print N "{\n";
|
||||
print N " iflag_t v1 = *a;\n";
|
||||
print N " iflag_t v2 = *b;\n";
|
||||
print N "\n";
|
||||
print N " iflag_clear(&v1, IF_CYRIX);\n";
|
||||
print N " iflag_clear(&v1, IF_AMD);\n";
|
||||
print N "\n";
|
||||
print N " iflag_clear(&v2, IF_CYRIX);\n";
|
||||
print N " iflag_clear(&v2, IF_AMD);\n";
|
||||
print N "\n";
|
||||
print N " if (v1.field[3] < v2.field[3])\n";
|
||||
print N " return -1;\n";
|
||||
print N " else if (v1.field[3] > v2.field[3])\n";
|
||||
print N " return 1;\n";
|
||||
print N "\n";
|
||||
print N " return 0;\n";
|
||||
print N "}\n";
|
||||
|
||||
|
||||
print N "\n";
|
||||
print N "static inline iflag_t __iflag_pfmask(iflag_t *a)\n";
|
||||
print N "{\n";
|
||||
print N " iflag_t r = (iflag_t) {\n";
|
||||
print N " .field[1] = a->field[1],\n";
|
||||
print N " .field[2] = a->field[2],\n";
|
||||
print N " };\n";
|
||||
print N "\n";
|
||||
print N " if (iflag_test(a, IF_CYRIX))\n";
|
||||
print N " iflag_set(&r, IF_CYRIX);\n";
|
||||
print N " if (iflag_test(a, IF_AMD))\n";
|
||||
print N " iflag_set(&r, IF_AMD);\n";
|
||||
print N "\n";
|
||||
print N " return r;\n";
|
||||
print N "}\n";
|
||||
|
||||
print N "\n";
|
||||
print N "#define iflag_pfmask(itemp) __iflag_pfmask(&insns_flags[(itemp)->iflag_idx])\n";
|
||||
|
||||
print N "\n";
|
||||
print N "#endif /* NASM_IFLAG_H__ */\n";
|
||||
print N "#endif /* NASM_IFLAGGEN_H */\n";
|
||||
close N;
|
||||
}
|
||||
|
||||
sub write_iflag_c() {
|
||||
print STDERR "Writing iflag.c ...\n";
|
||||
|
||||
open N, ">iflag.c";
|
||||
|
|
|
|||
10
insns.pl
10
insns.pl
|
|
@ -69,7 +69,7 @@ print STDERR "Reading insns.dat...\n";
|
|||
undef $output;
|
||||
foreach $arg ( @ARGV ) {
|
||||
if ( $arg =~ /^\-/ ) {
|
||||
if ( $arg =~ /^\-([abdint])$/ ) {
|
||||
if ( $arg =~ /^\-([abdin]|f[hc])$/ ) {
|
||||
$output = $1;
|
||||
} else {
|
||||
die "$0: Unknown option: ${arg}\n";
|
||||
|
|
@ -395,8 +395,12 @@ if ( !defined($output) || $output eq 'n' ) {
|
|||
close N;
|
||||
}
|
||||
|
||||
if ( !defined($output) || $output eq 't') {
|
||||
write_iflags();
|
||||
if ( !defined($output) || $output eq 'fh') {
|
||||
write_iflaggen_h();
|
||||
}
|
||||
|
||||
if ( !defined($output) || $output eq 'fc') {
|
||||
write_iflag_c();
|
||||
}
|
||||
|
||||
printf STDERR "Done: %d instructions\n", $insns;
|
||||
|
|
|
|||
Loading…
Reference in a new issue