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insns: add FXSAVE64/FXRSTOR64, drop np prefix

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Add FXSAVE64 and FXRSTOR64; drop the np prefix on 0F AE instructions:
none of the rest of the 0F AE instructions have them, and there are no
conflicts.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This commit is contained in:
H. Peter Anvin 2010-07-07 17:20:19 -07:00
parent 9eb663c087
commit 3a014348ca
1 changed files with 9 additions and 7 deletions
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16
insns.dat
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@ -1510,20 +1510,22 @@ UNPCKLPS xmmreg,xmmrm \360\2\x0F\x14\110 KATMAI,SSE
XORPS xmmreg,xmmrm \360\2\x0F\x57\110 KATMAI,SSE
;# Introduced in Deschutes but necessary for SSE support
FXRSTOR mem \2\x0F\xAE\201 P6,SSE,FPU
FXSAVE mem \2\x0F\xAE\200 P6,SSE,FPU
FXRSTOR mem [m: 0f ae /1] P6,SSE,FPU
FXRSTOR64 mem [m: o64 0f ae /1] X64,SSE,FPU
FXSAVE mem [m: 0f ae /0] P6,SSE,FPU
FXSAVE64 mem [m: o64 0f ae /0] X64,SSE,FPU
;# XSAVE group (AVX and extended state)
; Introduced in late Penryn ... we really need to clean up the handling
; of CPU feature bits.
XGETBV void \360\3\x0F\x01\xD0 NEHALEM
XSETBV void \360\3\x0F\x01\xD1 NEHALEM,PRIV
XSAVE mem [m: np 0f ae /4] NEHALEM
XSAVE mem [m: 0f ae /4] NEHALEM
XSAVE64 mem [m: o64 0f ae /4] LONG,NEHALEM
XSAVEOPT mem [m: np 0f ae /6] FUTURE
XSAVEOPT64 mem [m: o64 np 0f ae /6] LONG,FUTURE
XRSTOR mem [m: np 0f ae /5] NEHALEM
XRSTOR64 mem [m: o64 np 0f ae /5] LONG,NEHALEM
XSAVEOPT mem [m: 0f ae /6] FUTURE
XSAVEOPT64 mem [m: o64 0f ae /6] LONG,FUTURE
XRSTOR mem [m: 0f ae /5] NEHALEM
XRSTOR64 mem [m: o64 0f ae /5] LONG,NEHALEM
; These instructions are not SSE-specific; they are
;# Generic memory operations