insns.dat: add support for the V4* and VP4* 4-way instructions

New instructions which do four full iterations of a data-reduction
operation (FMA, dot product.)

Bug report: https://bugzilla.nasm.us/show_bug.cgi?id=3392492

Reported-by: ff_ff <qqqqqqqqqfffffffff@gmail.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
This commit is contained in:
H. Peter Anvin (Intel) 2018-06-25 14:51:15 -07:00
parent 26b810176f
commit 2bf35e0b02
2 changed files with 12 additions and 0 deletions

View file

@ -148,6 +148,8 @@ my %insns_flag_bit = (
"AVX512VNNI" => [$f++, "AVX-512 VNNI instructions"],
"AVX512BITALG" => [$f++, "AVX-512 Bit Algorithm instructions"],
"AVX512VPOPCNTDQ" => [$f++, "AVX-512 VPOPCNTD/VPOPCNTQ"],
"AVX5124FMAPS" => [$f++, "AVX-512 4-iteration multiply-add"],
"AVX5124VNNIW" => [$f++, "AVX-512 4-iteration dot product"],
# Put these last
"OBSOLETE" => [$f++, "Instruction removed from architecture"],

View file

@ -5332,6 +5332,16 @@ VPSHUFBITQMB kreg|mask,xmmreg,xmmrm128 [rvm:fvm: evex.nds.128.66.0f38.w0 8f /r
VPSHUFBITQMB kreg|mask,ymmreg,ymmrm256 [rvm:fvm: evex.nds.256.66.0f38.w0 8f /r] AVX512BITALG,AVX512VL,FUTURE
VPSHUFBITQMB kreg|mask,zmmreg,zmmrm512 [rvm:fvm: evex.nds.512.66.0f38.w0 8f /r] AVX512BITALG,FUTURE
;# AVX512 4-iteration Multiply-Add
V4FMADDPS zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 9a /r] AVX5124FMAPS,FUTURE
V4FNMADDPS zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 9a /r] AVX5124FMAPS,FUTURE
V4FMADDSS zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 9b /r] AVX5124FMAPS,FUTURE
V4FNMADDSS zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 9b /r] AVX5124FMAPS,FUTURE
;# AVX512 4-iteration Dot Product
V4DPWSSDS zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 53 /r] AVX5124VNNIW,FUTURE
V4DPWSSD zmmreg|mask|z,zmmreg,mem128 [rvm:m128:evex.dds.512.f2.0f38.w0 52 /r] AVX5124VNNIW,FUTURE
;# Systematic names for the hinting nop instructions
; These should be last in the file
HINT_NOP0 rm16 [m: o16 0f 18 /0] P6,UNDOC