assemble_file(): break up this gigantic mess
Break up this gigantic mess which touches way too many layers. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This commit is contained in:
H. Peter Anvin
parent
5307832cd1
commit
2965154684
2 changed files with 210 additions and 177 deletions
153
asm/assemble.c
153
asm/assemble.c
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@ -823,19 +823,133 @@ int64_t assemble(int32_t segment, int64_t start, int bits, insn *instruction)
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return data.offset - start;
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}
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static void debug_set_db_type(insn *instruction)
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{
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/* Is this really correct? .operands doesn't mean much for Dx */
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int32_t typeinfo = TYS_ELEMENTS(instruction->operands);
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switch (instruction->opcode) {
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case I_DB:
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typeinfo |= TY_BYTE;
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break;
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case I_DW:
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typeinfo |= TY_WORD;
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break;
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case I_DD:
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if (instruction->eops_float)
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typeinfo |= TY_FLOAT;
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else
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typeinfo |= TY_DWORD;
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break;
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case I_DQ:
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/* What about double? */
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typeinfo |= TY_QWORD;
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break;
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case I_DT:
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/* What about long double? */
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typeinfo |= TY_TBYTE;
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break;
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case I_DO:
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typeinfo |= TY_OWORD;
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break;
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case I_DY:
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typeinfo |= TY_YWORD;
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break;
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case I_DZ:
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typeinfo |= TY_ZWORD;
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break;
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default:
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panic();
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}
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dfmt->debug_typevalue(typeinfo);
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}
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static void debug_set_type(insn *instruction)
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{
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int32_t typeinfo;
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if (opcode_is_resb(instruction->opcode)) {
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typeinfo = TYS_ELEMENTS(instruction->oprs[0].offset);
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switch (instruction->opcode) {
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case I_RESB:
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typeinfo |= TY_BYTE;
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break;
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case I_RESW:
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typeinfo |= TY_WORD;
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break;
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case I_RESD:
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typeinfo |= TY_DWORD;
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break;
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case I_RESQ:
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typeinfo |= TY_QWORD;
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break;
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case I_REST:
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typeinfo |= TY_TBYTE;
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break;
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case I_RESO:
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typeinfo |= TY_OWORD;
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break;
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case I_RESY:
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typeinfo |= TY_YWORD;
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break;
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case I_RESZ:
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typeinfo |= TY_ZWORD;
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break;
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default:
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panic();
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}
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} else {
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typeinfo = TY_LABEL;
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}
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dfmt->debug_typevalue(typeinfo);
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}
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/* Proecess an EQU directive */
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static void define_equ(insn * instruction)
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{
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if (!instruction->label) {
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nasm_nonfatal("EQU not preceded by label");
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} else if (instruction->operands == 1 &&
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(instruction->oprs[0].type & IMMEDIATE) &&
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instruction->oprs[0].wrt == NO_SEG) {
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define_label(instruction->label,
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instruction->oprs[0].segment,
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instruction->oprs[0].offset, false);
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} else if (instruction->operands == 2
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&& (instruction->oprs[0].type & IMMEDIATE)
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&& (instruction->oprs[0].type & COLON)
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&& instruction->oprs[0].segment == NO_SEG
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&& instruction->oprs[0].wrt == NO_SEG
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&& (instruction->oprs[1].type & IMMEDIATE)
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&& instruction->oprs[1].segment == NO_SEG
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&& instruction->oprs[1].wrt == NO_SEG) {
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define_label(instruction->label,
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instruction->oprs[0].offset | SEG_ABS,
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instruction->oprs[1].offset, false);
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} else {
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nasm_nonfatal("bad syntax for EQU");
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}
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}
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int64_t insn_size(int32_t segment, int64_t offset, int bits, insn *instruction)
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{
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const struct itemplate *temp;
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enum match_result m;
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int64_t isize = 0;
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if (instruction->opcode == I_none)
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if (instruction->opcode == I_none) {
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return 0;
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if (opcode_is_db(instruction->opcode)) {
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} else if (instruction->opcode == I_EQU) {
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define_equ(instruction);
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return 0;
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} else if (opcode_is_db(instruction->opcode)) {
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extop *e;
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int32_t isize, osize, wsize;
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int32_t osize, wsize;
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isize = 0;
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wsize = db_bytes(instruction->opcode);
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nasm_assert(wsize > 0);
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@ -855,10 +969,10 @@ int64_t insn_size(int32_t segment, int64_t offset, int bits, insn *instruction)
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align += wsize;
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isize += osize + align;
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}
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return isize;
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}
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if (instruction->opcode == I_INCBIN) {
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debug_set_db_type(instruction);
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return isize;
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} else if (instruction->opcode == I_INCBIN) {
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const char *fname = instruction->eops->stringval;
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off_t len;
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@ -885,17 +999,20 @@ int64_t insn_size(int32_t segment, int64_t offset, int bits, insn *instruction)
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instruction->times = 1; /* Tell the upper layer to not iterate */
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return len;
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}
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/* Check to see if we need an address-size prefix */
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add_asp(instruction, bits);
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m = find_match(&temp, instruction, segment, offset, bits);
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if (m == MOK_GOOD) {
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/* we've matched an instruction. */
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return calcsize(segment, offset, bits, instruction, temp);
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} else {
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return -1; /* didn't match any instruction */
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/* Normal instruction, or RESx */
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/* Check to see if we need an address-size prefix */
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add_asp(instruction, bits);
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m = find_match(&temp, instruction, segment, offset, bits);
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if (m != MOK_GOOD)
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return -1; /* No match */
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isize = calcsize(segment, offset, bits, instruction, temp);
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debug_set_type(instruction);
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return isize;
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}
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}
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234
asm/nasm.c
234
asm/nasm.c
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@ -1410,11 +1410,83 @@ static void parse_cmdline(int argc, char **argv, int pass)
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}
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}
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static void forward_refs(insn *instruction)
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{
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int i;
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struct forwrefinfo *fwinf;
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instruction->forw_ref = false;
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if (!optimizing.level)
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return; /* For -O0 don't bother */
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if (!forwref)
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return;
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if (forwref->lineno != globallineno)
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return;
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instruction->forw_ref = true;
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do {
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instruction->oprs[forwref->operand].opflags |= OPFLAG_FORWARD;
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forwref = saa_rstruct(forwrefs);
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} while (forwref && forwref->lineno == globallineno);
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if (!pass_first())
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return;
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for (i = 0; i < instruction->operands; i++) {
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if (instruction->oprs[i].opflags & OPFLAG_FORWARD) {
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fwinf = saa_wstruct(forwrefs);
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fwinf->lineno = globallineno;
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fwinf->operand = i;
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}
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}
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}
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static void process_insn(insn *instruction)
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{
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int32_t n;
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int64_t l;
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if (!instruction->times)
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return; /* Nothing to do... */
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nasm_assert(instruction->times > 0);
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/*
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* NOTE: insn_size() can change instruction->times
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* (usually to 1) when called.
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*/
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if (!pass_final()) {
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for (n = 1; n <= instruction->times; n++) {
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l = insn_size(location.segment, location.offset,
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globalbits, instruction);
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if (l != -1) /* l == -1 -> invalid instruction */
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increment_offset(l);
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}
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} else {
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l = assemble(location.segment, location.offset,
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globalbits, instruction);
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/* We can't get an invalid instruction here */
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increment_offset(l);
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if (instruction->times > 1) {
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lfmt->uplevel(LIST_TIMES);
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for (n = 2; n <= instruction->times; n++) {
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l = assemble(location.segment, location.offset,
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globalbits, instruction);
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increment_offset(l);
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}
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lfmt->downlevel(LIST_TIMES);
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}
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}
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}
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static void assemble_file(const char *fname, struct strlist *depend_list)
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{
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char *line;
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insn output_ins;
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int i;
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uint64_t prev_offset_changed;
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int64_t stall_count = 0; /* Make sure we make forward progress... */
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@ -1498,164 +1570,8 @@ static void assemble_file(const char *fname, struct strlist *depend_list)
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/* Not a directive, or even something that starts with [ */
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parse_line(line, &output_ins);
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if (optimizing.level > 0) {
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if (forwref != NULL && globallineno == forwref->lineno) {
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output_ins.forw_ref = true;
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do {
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output_ins.oprs[forwref->operand].opflags |= OPFLAG_FORWARD;
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forwref = saa_rstruct(forwrefs);
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} while (forwref != NULL
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&& forwref->lineno == globallineno);
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} else
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output_ins.forw_ref = false;
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if (output_ins.forw_ref) {
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if (pass_first()) {
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for (i = 0; i < output_ins.operands; i++) {
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if (output_ins.oprs[i].opflags & OPFLAG_FORWARD) {
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struct forwrefinfo *fwinf = (struct forwrefinfo *)saa_wstruct(forwrefs);
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fwinf->lineno = globallineno;
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fwinf->operand = i;
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}
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}
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}
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}
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}
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/* forw_ref */
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if (output_ins.opcode == I_EQU) {
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if (!output_ins.label) {
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nasm_nonfatal("EQU not preceded by label");
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} else if (output_ins.operands == 1 &&
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(output_ins.oprs[0].type & IMMEDIATE) &&
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output_ins.oprs[0].wrt == NO_SEG) {
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define_label(output_ins.label,
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output_ins.oprs[0].segment,
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output_ins.oprs[0].offset, false);
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} else if (output_ins.operands == 2
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&& (output_ins.oprs[0].type & IMMEDIATE)
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&& (output_ins.oprs[0].type & COLON)
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&& output_ins.oprs[0].segment == NO_SEG
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&& output_ins.oprs[0].wrt == NO_SEG
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&& (output_ins.oprs[1].type & IMMEDIATE)
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&& output_ins.oprs[1].segment == NO_SEG
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&& output_ins.oprs[1].wrt == NO_SEG) {
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define_label(output_ins.label,
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output_ins.oprs[0].offset | SEG_ABS,
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output_ins.oprs[1].offset, false);
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} else {
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nasm_nonfatal("bad syntax for EQU");
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}
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} else { /* instruction isn't an EQU */
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int32_t n;
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nasm_assert(output_ins.times >= 0);
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for (n = 1; n <= output_ins.times; n++) {
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if (!pass_final()) {
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int64_t l = insn_size(location.segment,
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location.offset,
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globalbits, &output_ins);
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/* if (using_debug_info) && output_ins.opcode != -1) */
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if (using_debug_info)
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{ /* fbk 03/25/01 */
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/* this is done here so we can do debug type info */
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int32_t typeinfo =
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TYS_ELEMENTS(output_ins.operands);
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switch (output_ins.opcode) {
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case I_RESB:
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typeinfo =
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TYS_ELEMENTS(output_ins.oprs[0].offset) | TY_BYTE;
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break;
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case I_RESW:
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typeinfo =
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TYS_ELEMENTS(output_ins.oprs[0].offset) | TY_WORD;
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break;
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case I_RESD:
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typeinfo =
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TYS_ELEMENTS(output_ins.oprs[0].offset) | TY_DWORD;
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break;
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case I_RESQ:
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typeinfo =
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TYS_ELEMENTS(output_ins.oprs[0].offset) | TY_QWORD;
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break;
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case I_REST:
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typeinfo =
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TYS_ELEMENTS(output_ins.oprs[0].offset) | TY_TBYTE;
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break;
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case I_RESO:
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typeinfo =
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TYS_ELEMENTS(output_ins.oprs[0].offset) | TY_OWORD;
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break;
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case I_RESY:
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typeinfo =
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TYS_ELEMENTS(output_ins.oprs[0].offset) | TY_YWORD;
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break;
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case I_RESZ:
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typeinfo =
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TYS_ELEMENTS(output_ins.oprs[0].offset) | TY_ZWORD;
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break;
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case I_DB:
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typeinfo |= TY_BYTE;
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break;
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case I_DW:
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typeinfo |= TY_WORD;
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break;
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case I_DD:
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if (output_ins.eops_float)
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typeinfo |= TY_FLOAT;
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else
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typeinfo |= TY_DWORD;
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break;
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case I_DQ:
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typeinfo |= TY_QWORD;
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break;
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case I_DT:
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typeinfo |= TY_TBYTE;
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break;
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case I_DO:
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typeinfo |= TY_OWORD;
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break;
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case I_DY:
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typeinfo |= TY_YWORD;
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break;
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case I_DZ:
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typeinfo |= TY_ZWORD;
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break;
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default:
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typeinfo = TY_LABEL;
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break;
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}
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dfmt->debug_typevalue(typeinfo);
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}
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/*
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* For INCBIN, let the code in assemble
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* handle TIMES, so we don't have to read the
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* input file over and over.
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*/
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if (l != -1) {
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increment_offset(l);
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}
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/*
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* else l == -1 => invalid instruction, which will be
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* flagged as an error on pass 2
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*/
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} else {
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if (n == 2)
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lfmt->uplevel(LIST_TIMES);
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increment_offset(assemble(location.segment,
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location.offset,
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globalbits, &output_ins));
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}
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} /* not an EQU */
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}
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if (output_ins.times > 1)
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lfmt->downlevel(LIST_TIMES);
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forward_refs(&output_ins);
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process_insn(&output_ins);
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cleanup_insn(&output_ins);
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end_of_line:
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