Fix disassembly of XCHG
"REX.B 90" in 64-bit mode is "xchg eax,r8d" not "nop"; equivalent situation for "REX.WB 90" (xchg rax,r8).
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f72151f43e
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2344010d26
3 changed files with 28 additions and 1 deletions
15
assemble.c
15
assemble.c
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@ -54,6 +54,10 @@
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* \311 - indicates fixed 32-bit address size, i.e. optional 0x67.
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* \312 - (disassembler only) marker on LOOP, LOOPxx instructions.
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* \313 - indicates fixed 64-bit address size, 0x67 invalid.
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* \314 - (disassembler only) invalid with REX.B
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* \315 - (disassembler only) invalid with REX.X
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* \316 - (disassembler only) invalid with REX.R
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* \317 - (disassembler only) invalid with REX.W
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* \320 - indicates fixed 16-bit operand size, i.e. optional 0x66.
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* \321 - indicates fixed 32-bit operand size, i.e. optional 0x66.
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* \322 - indicates that this instruction is only valid when the
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@ -965,6 +969,11 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
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has_prefix(ins, PPS_ASIZE, P_A32))
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return -1;
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break;
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case 0314:
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case 0315:
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case 0316:
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case 0317:
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break;
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case 0320:
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length += (bits != 16);
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break;
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@ -1491,6 +1500,12 @@ static void gencode(int32_t segment, int64_t offset, int bits,
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ins->rex = 0;
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break;
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case 0314:
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case 0315:
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case 0316:
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case 0317:
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break;
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case 0320:
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if (bits != 16) {
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*bytes = 0x66;
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12
disasm.c
12
disasm.c
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@ -584,6 +584,18 @@ static int matches(const struct itemplate *t, uint8_t *data,
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return false;
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else
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a_used = true;
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} else if (c == 0314) {
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if (prefix->rex & REX_B)
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return false;
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} else if (c == 0315) {
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if (prefix->rex & REX_X)
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return false;
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} else if (c == 0316) {
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if (prefix->rex & REX_R)
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return false;
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} else if (c == 0317) {
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if (prefix->rex & REX_W)
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return false;
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} else if (c == 0320) {
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if (osize != 16)
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return false;
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@ -773,7 +773,7 @@ NEG rm8 \1\xF6\203 8086
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NEG rm16 \320\1\xF7\203 8086
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NEG rm32 \321\1\xF7\203 386
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NEG rm64 \324\1\xF7\203 X64
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NOP void \1\x90 8086
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NOP void \314\1\x90 8086
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NOP rm16 \320\2\x0F\x1F\200 P6
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NOP rm32 \321\2\x0F\x1F\200 P6
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NOP rm64 \324\2\x0F\x1F\200 X64
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