Comment out matches() operand flags logic
Also space fix Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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acf256f4db
commit
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1 changed files with 82 additions and 59 deletions
141
assemble.c
141
assemble.c
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@ -1,5 +1,5 @@
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/* ----------------------------------------------------------------------- *
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*
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*
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* Copyright 1996-2009 The NASM Authors - All Rights Reserved
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* See the file AUTHORS included with the NASM distribution for
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* the specific copyright holders.
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@ -14,7 +14,7 @@
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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*
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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@ -2021,7 +2021,7 @@ done:
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}
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static enum match_result matches(const struct itemplate *itemp,
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insn *instruction, int bits)
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insn *instruction, int bits)
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{
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int i, size[MAX_OPERANDS], asize, oprs;
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bool opsizemissing = false;
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@ -2050,86 +2050,109 @@ static enum match_result matches(const struct itemplate *itemp,
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*/
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switch (itemp->flags & IF_SMASK) {
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case IF_SB:
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asize = BITS8;
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break;
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asize = BITS8;
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break;
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case IF_SW:
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asize = BITS16;
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break;
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asize = BITS16;
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break;
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case IF_SD:
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asize = BITS32;
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break;
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asize = BITS32;
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break;
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case IF_SQ:
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asize = BITS64;
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break;
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asize = BITS64;
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break;
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case IF_SO:
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asize = BITS128;
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break;
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asize = BITS128;
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break;
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case IF_SY:
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asize = BITS256;
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break;
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asize = BITS256;
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break;
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case IF_SZ:
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switch (bits) {
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case 16:
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asize = BITS16;
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break;
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case 32:
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asize = BITS32;
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break;
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case 64:
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asize = BITS64;
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break;
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default:
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asize = 0;
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break;
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}
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break;
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switch (bits) {
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case 16:
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asize = BITS16;
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break;
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case 32:
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asize = BITS32;
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break;
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case 64:
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asize = BITS64;
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break;
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default:
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asize = 0;
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break;
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}
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break;
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default:
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asize = 0;
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break;
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asize = 0;
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break;
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}
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if (itemp->flags & IF_ARMASK) {
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/* S- flags only apply to a specific operand */
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i = ((itemp->flags & IF_ARMASK) >> IF_ARSHFT) - 1;
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memset(size, 0, sizeof size);
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size[i] = asize;
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/* S- flags only apply to a specific operand */
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i = ((itemp->flags & IF_ARMASK) >> IF_ARSHFT) - 1;
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memset(size, 0, sizeof size);
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size[i] = asize;
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} else {
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/* S- flags apply to all operands */
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for (i = 0; i < MAX_OPERANDS; i++)
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size[i] = asize;
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/* S- flags apply to all operands */
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for (i = 0; i < MAX_OPERANDS; i++)
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size[i] = asize;
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}
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/*
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* Check that the operand flags all match up
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* Check that the operand flags all match up,
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* it's a bit tricky so lets be verbose:
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*
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* 1) Find out the size of operand. If instruction
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* doesn't have one specified -- we're trying to
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* guess it either from template (IF_S* flag) or
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* from code bits.
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*
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* 2) If template operand (i) has SAME_AS flag [used for registers only]
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* (ie the same operand as was specified somewhere in template, and
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* this referred operand index is being achieved via ~SAME_AS)
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* we are to be sure that both registers (in template and instruction)
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* do exactly match.
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*
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* 3) If template operand do not match the instruction OR
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* template has an operand size specified AND this size differ
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* from which instruction has (perhaps we got it from code bits)
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* we are:
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* a) Check that only size of instruction and operand is differ
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* other characteristics do match
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* b) Perhaps it's a register specified in instruction so
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* for such a case we just mark that operand as "size
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* missing" and this will turn on fuzzy operand size
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* logic facility (handled by a caller)
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*/
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for (i = 0; i < itemp->operands; i++) {
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opflags_t type = instruction->oprs[i].type;
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if (!(type & SIZE_MASK))
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type |= size[i];
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opflags_t type = instruction->oprs[i].type;
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if (!(type & SIZE_MASK))
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type |= size[i];
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if (itemp->opd[i] & SAME_AS) {
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int j = itemp->opd[i] & ~SAME_AS;
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if (type != instruction->oprs[j].type ||
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instruction->oprs[i].basereg != instruction->oprs[j].basereg)
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return MERR_INVALOP;
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} else if (itemp->opd[i] & ~type ||
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if (itemp->opd[i] & SAME_AS) {
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int j = itemp->opd[i] & ~SAME_AS;
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if (type != instruction->oprs[j].type ||
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instruction->oprs[i].basereg != instruction->oprs[j].basereg)
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return MERR_INVALOP;
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} else if (itemp->opd[i] & ~type ||
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((itemp->opd[i] & SIZE_MASK) &&
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((itemp->opd[i] ^ type) & SIZE_MASK))) {
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if ((itemp->opd[i] & ~type & ~SIZE_MASK) || (type & SIZE_MASK)) {
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return MERR_INVALOP;
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} else if (!is_class(REGISTER, type)) {
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/*
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* Note: we don't honor extrinsic operand sizes for registers,
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* so "missing operand size" for a register should be
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* considered a wildcard match rather than an error.
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*/
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opsizemissing = true;
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}
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} else if (!is_class(REGISTER, type)) {
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/*
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* Note: we don't honor extrinsic operand sizes for registers,
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* so "missing operand size" for a register should be
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* considered a wildcard match rather than an error.
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*/
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opsizemissing = true;
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}
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}
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}
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if (opsizemissing)
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return MERR_OPSIZEMISSING;
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return MERR_OPSIZEMISSING;
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/*
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* Check operand sizes
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@ -2170,7 +2193,7 @@ static enum match_result matches(const struct itemplate *itemp,
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* Check if special handling needed for Jumps
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*/
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if ((itemp->code[0] & 0374) == 0370)
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return MOK_JUMP;
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return MOK_JUMP;
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return MOK_GOOD;
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}
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