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x86/insns.dat: add tuple type for the latest AVX512 instructions

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Add missing tuple type (all are Full - fv:) for the latest AVX512
instructions.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
This commit is contained in:
H. Peter Anvin 2020-07-17 17:44:27 -07:00
parent 848b1657fd
commit 1d8c09b24e
1 changed files with 12 additions and 12 deletions
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24
x86/insns.dat
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@ -6015,20 +6015,20 @@ XRESLDTRK void [ f2 0f 01 e9] TSXLDTRK,FUTURE
XSUSLDTRK void [ f2 0f 01 e8] TSXLDTRK,FUTURE
;# AVX512 Bfloat16 instructions
VCVTNE2PS2BF16 xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm: evex.128.f2.0f38.w0 72 /r] AVX512BF16,FUTURE
VCVTNE2PS2BF16 ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm: evex.256.f2.0f38.w0 72 /r] AVX512BF16,FUTURE
VCVTNE2PS2BF16 zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm: evex.512.f2.0f38.w0 72 /r] AVX512BF16,FUTURE
VCVTNE2PS2BF16 xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm: evex.128.f3.0f38.w0 72 /r] AVX512BF16,FUTURE
VCVTNE2PS2BF16 ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm: evex.256.f3.0f38.w0 72 /r] AVX512BF16,FUTURE
VCVTNE2PS2BF16 zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm: evex.512.f3.0f38.w0 72 /r] AVX512BF16,FUTURE
VDPBF16PS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm: evex.128.f3.0f38.w0 52 /r] AVX512BF16,FUTURE
VDPBF16PS ymmreg|mask|z,ymmreg*,ymmrm128|b32 [rvm: evex.256.f3.0f38.w0 52 /r] AVX512BF16,FUTURE
VDPBF16PS zmmreg|mask|z,zmmreg*,zmmrm128|b32 [rvm: evex.512.f3.0f38.w0 52 /r] AVX512BF16,FUTURE
VCVTNE2PS2BF16 xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.128.f2.0f38.w0 72 /r] AVX512BF16,FUTURE
VCVTNE2PS2BF16 ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.256.f2.0f38.w0 72 /r] AVX512BF16,FUTURE
VCVTNE2PS2BF16 zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.512.f2.0f38.w0 72 /r] AVX512BF16,FUTURE
VCVTNE2PS2BF16 xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 72 /r] AVX512BF16,FUTURE
VCVTNE2PS2BF16 ymmreg|mask|z,ymmreg*,ymmrm256|b32 [rvm:fv: evex.256.f3.0f38.w0 72 /r] AVX512BF16,FUTURE
VCVTNE2PS2BF16 zmmreg|mask|z,zmmreg*,zmmrm512|b32 [rvm:fv: evex.512.f3.0f38.w0 72 /r] AVX512BF16,FUTURE
VDPBF16PS xmmreg|mask|z,xmmreg*,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 52 /r] AVX512BF16,FUTURE
VDPBF16PS ymmreg|mask|z,ymmreg*,ymmrm128|b32 [rvm:fv: evex.256.f3.0f38.w0 52 /r] AVX512BF16,FUTURE
VDPBF16PS zmmreg|mask|z,zmmreg*,zmmrm128|b32 [rvm:fv: evex.512.f3.0f38.w0 52 /r] AVX512BF16,FUTURE
;# AVX512 mask intersect instructions
VP2INTERSECTD kreg|rs2,xmmreg,xmmrm128|b32 [rvm: evex.nds.128.f2.0f38.w0 68 /r] AVX512BF16,FUTURE
VP2INTERSECTD kreg|rs2,ymmreg,ymmrm128|b32 [rvm: evex.nds.256.f2.0f38.w0 68 /r] AVX512BF16,FUTURE
VP2INTERSECTD kreg|rs2,zmmreg,zmmrm128|b32 [rvm: evex.nds.512.f2.0f38.w0 68 /r] AVX512BF16,FUTURE
VP2INTERSECTD kreg|rs2,xmmreg,xmmrm128|b32 [rvm:fv: evex.nds.128.f2.0f38.w0 68 /r] AVX512BF16,FUTURE
VP2INTERSECTD kreg|rs2,ymmreg,ymmrm128|b32 [rvm:fv: evex.nds.256.f2.0f38.w0 68 /r] AVX512BF16,FUTURE
VP2INTERSECTD kreg|rs2,zmmreg,zmmrm128|b32 [rvm:fv: evex.nds.512.f2.0f38.w0 68 /r] AVX512BF16,FUTURE
;# Intel Advanced Matrix Extensions (AMX)
LDTILECFG mem512 [m: vex.128.np.0f38.w0 49 /0] AMXTILE,FUTURE,SZ,X64