bac00c3422
This patch enables STV when the first operand of a TImode binary
logic operand (AND, IOR or XOR) is a memory operand, which is commonly
the case with read-modify-write instructions.
A different motivating example from the one given previously is:
__int128 m, p, q;
void foo() {
m ^= (p & q);
}
Currently with -O2 -mavx the RMW instructions are rejected by STV,
resulting in scalar code:
foo: movq p(%rip), %rax
movq p+8(%rip), %rdx
andq q(%rip), %rax
andq q+8(%rip), %rdx
xorq %rax, m(%rip)
xorq %rdx, m+8(%rip)
ret
With this patch they become scalar-to-vector candidates:
foo: vmovdqa p(%rip), %xmm0
vpand q(%rip), %xmm0, %xmm0
vpxor m(%rip), %xmm0, %xmm0
vmovdqa %xmm0, m(%rip)
ret
2024-08-31 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* config/i386/i386-features.cc (timode_scalar_to_vector_candidate_p):
Support the first operand of AND, IOR and XOR being MEM_P, i.e. a
read-modify-write insn.
gcc/testsuite/ChangeLog
* gcc.target/i386/movti-2.c: Change dg-options to -Os.
* gcc.target/i386/movti-4.c: Expected output of original movti-2.c.
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