a1ee6d507b
ARM understands VEC_COND_EXPR<v == w, -1, 0> but not a plain v == w which is fed to something other than VEC_COND_EXPR (say BIT_IOR_EXPR). This patch avoids introducing the second kind of statement after the vector lowering pass, which is the last chance to turn v == w back into something the target handles. This is just a workaround to avoid ICEs, a v == w produced before vector lowering will yield pretty bad code. Either the arm target needs to learn to handle vector comparisons (aarch64 already does), or the middle-end needs to fall back to vcond when plain comparisons are not supported (or ...). 2020-08-07 Marc Glisse <marc.glisse@inria.fr> * generic-match-head.c (optimize_vectors_before_lowering_p): New function. * gimple-match-head.c (optimize_vectors_before_lowering_p): Likewise. * match.pd ((v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Use it. |
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