[ARM] Factor out CMSE register clearing code
Functions cmse_nonsecure_call_clear_caller_saved and
cmse_nonsecure_entry_clear_before_return both contain very similar code
to clear registers. What's worse, they differ slightly at times so if a
bug is found in one careful thoughts is needed to decide whether the
other function needs fixing too.
This commit addresses the situation by factoring the two pieces of code
into a new function. In doing so the code generated to clear VFP
registers in cmse_nonsecure_call now uses the same sequence as
cmse_nonsecure_entry functions. Tests expectation are thus updated
accordingly.
2017-11-22 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/arm.c (cmse_clear_registers): New function.
(cmse_nonsecure_call_clear_caller_saved): Replace register clearing
code by call to cmse_clear_registers.
(cmse_nonsecure_entry_clear_before_return): Likewise.
gcc/testsuite/
* gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c: Adapt expectations
to vmov instructions now generated.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c: Likewise.
* gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c: Likewise.
* gcc.target/arm/cmse/mainline/hard/cmse-13.c: Likewise.
* gcc.target/arm/cmse/mainline/hard/cmse-7.c: Likewise.
* gcc.target/arm/cmse/mainline/hard/cmse-8.c: Likewise.
From-SVN: r255065
This commit is contained in:
Thomas Preud'homme
Thomas Preud'homme
parent
9388732aa5
commit
fc7160b2c7
9 changed files with 235 additions and 217 deletions
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@ -1,3 +1,10 @@
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2017-11-22 Thomas Preud'homme <thomas.preudhomme@arm.com>
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* config/arm/arm.c (cmse_clear_registers): New function.
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(cmse_nonsecure_call_clear_caller_saved): Replace register clearing
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code by call to cmse_clear_registers.
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(cmse_nonsecure_entry_clear_before_return): Likewise.
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2017-11-22 Tamar Christina <tamar.christina@arm.com>
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* config/arm/arm_neon.h (vdot_u32, vdotq_u32)
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@ -16992,6 +16992,128 @@ compute_not_to_clear_mask (tree arg_type, rtx arg_rtx, int regno,
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return not_to_clear_mask;
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}
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/* Clear registers secret before doing a cmse_nonsecure_call or returning from
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a cmse_nonsecure_entry function. TO_CLEAR_BITMAP indicates which registers
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are to be fully cleared, using the value in register CLEARING_REG if more
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efficient. The PADDING_BITS_LEN entries array PADDING_BITS_TO_CLEAR gives
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the bits that needs to be cleared in caller-saved core registers, with
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SCRATCH_REG used as a scratch register for that clearing.
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NOTE: one of three following assertions must hold:
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- SCRATCH_REG is a low register
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- CLEARING_REG is in the set of registers fully cleared (ie. its bit is set
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in TO_CLEAR_BITMAP)
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- CLEARING_REG is a low register. */
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static void
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cmse_clear_registers (sbitmap to_clear_bitmap, uint32_t *padding_bits_to_clear,
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int padding_bits_len, rtx scratch_reg, rtx clearing_reg)
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{
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bool saved_clearing = false;
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rtx saved_clearing_reg = NULL_RTX;
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int i, regno, clearing_regno, minregno = R0_REGNUM, maxregno = minregno - 1;
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gcc_assert (arm_arch_cmse);
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if (!bitmap_empty_p (to_clear_bitmap))
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{
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minregno = bitmap_first_set_bit (to_clear_bitmap);
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maxregno = bitmap_last_set_bit (to_clear_bitmap);
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}
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clearing_regno = REGNO (clearing_reg);
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/* Clear padding bits. */
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gcc_assert (padding_bits_len <= NUM_ARG_REGS);
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for (i = 0, regno = R0_REGNUM; i < padding_bits_len; i++, regno++)
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{
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uint64_t mask;
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rtx rtx16, dest, cleared_reg = gen_rtx_REG (SImode, regno);
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if (padding_bits_to_clear[i] == 0)
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continue;
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/* If this is a Thumb-1 target and SCRATCH_REG is not a low register, use
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CLEARING_REG as scratch. */
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if (TARGET_THUMB1
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&& REGNO (scratch_reg) > LAST_LO_REGNUM)
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{
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/* clearing_reg is not to be cleared, copy its value into scratch_reg
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such that we can use clearing_reg to clear the unused bits in the
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arguments. */
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if ((clearing_regno > maxregno
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|| !bitmap_bit_p (to_clear_bitmap, clearing_regno))
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&& !saved_clearing)
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{
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gcc_assert (clearing_regno <= LAST_LO_REGNUM);
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emit_move_insn (scratch_reg, clearing_reg);
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saved_clearing = true;
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saved_clearing_reg = scratch_reg;
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}
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scratch_reg = clearing_reg;
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}
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/* Fill the lower half of the negated padding_bits_to_clear[i]. */
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mask = (~padding_bits_to_clear[i]) & 0xFFFF;
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emit_move_insn (scratch_reg, gen_int_mode (mask, SImode));
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/* Fill the top half of the negated padding_bits_to_clear[i]. */
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mask = (~padding_bits_to_clear[i]) >> 16;
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rtx16 = gen_int_mode (16, SImode);
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dest = gen_rtx_ZERO_EXTRACT (SImode, scratch_reg, rtx16, rtx16);
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if (mask)
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emit_insn (gen_rtx_SET (dest, gen_int_mode (mask, SImode)));
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emit_insn (gen_andsi3 (cleared_reg, cleared_reg, scratch_reg));
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}
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if (saved_clearing)
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emit_move_insn (clearing_reg, saved_clearing_reg);
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/* Clear full registers. */
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/* If not marked for clearing, clearing_reg already does not contain
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any secret. */
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if (clearing_regno <= maxregno
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&& bitmap_bit_p (to_clear_bitmap, clearing_regno))
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{
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emit_move_insn (clearing_reg, const0_rtx);
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emit_use (clearing_reg);
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bitmap_clear_bit (to_clear_bitmap, clearing_regno);
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}
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for (regno = minregno; regno <= maxregno; regno++)
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{
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if (!bitmap_bit_p (to_clear_bitmap, regno))
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continue;
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if (IS_VFP_REGNUM (regno))
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{
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/* If regno is an even vfp register and its successor is also to
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be cleared, use vmov. */
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if (TARGET_VFP_DOUBLE
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&& VFP_REGNO_OK_FOR_DOUBLE (regno)
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&& bitmap_bit_p (to_clear_bitmap, regno + 1))
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{
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emit_move_insn (gen_rtx_REG (DFmode, regno),
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CONST1_RTX (DFmode));
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emit_use (gen_rtx_REG (DFmode, regno));
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regno++;
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}
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else
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{
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emit_move_insn (gen_rtx_REG (SFmode, regno),
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CONST1_RTX (SFmode));
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emit_use (gen_rtx_REG (SFmode, regno));
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}
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}
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else
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{
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emit_move_insn (gen_rtx_REG (SImode, regno), clearing_reg);
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emit_use (gen_rtx_REG (SImode, regno));
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}
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}
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}
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/* Clears caller saved registers not used to pass arguments before a
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cmse_nonsecure_call. Saving, clearing and restoring of callee saved
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registers is done in __gnu_cmse_nonsecure_call libcall.
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@ -17012,12 +17134,12 @@ cmse_nonsecure_call_clear_caller_saved (void)
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TARGET_HARD_FLOAT_ABI ? D7_VFP_REGNUM : NUM_ARG_REGS - 1;
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auto_sbitmap to_clear_bitmap (maxregno + 1);
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rtx_insn *seq;
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rtx pat, call, unspec, reg, cleared_reg, tmp;
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rtx pat, call, unspec, clearing_reg, ip_reg, shift;
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rtx address;
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CUMULATIVE_ARGS args_so_far_v;
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cumulative_args_t args_so_far;
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tree arg_type, fntype;
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bool using_r4, first_param = true;
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bool first_param = true;
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function_args_iterator args_iter;
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uint32_t padding_bits_to_clear[4] = {0U, 0U, 0U, 0U};
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@ -17116,79 +17238,20 @@ cmse_nonsecure_call_clear_caller_saved (void)
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first_param = false;
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}
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/* Clear padding bits where needed. */
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cleared_reg = XEXP (address, 0);
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reg = gen_rtx_REG (SImode, IP_REGNUM);
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using_r4 = false;
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for (regno = R0_REGNUM; regno < NUM_ARG_REGS; regno++)
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{
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if (padding_bits_to_clear[regno] == 0)
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continue;
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/* If this is a Thumb-1 target copy the address of the function
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we are calling from 'r4' into 'ip' such that we can use r4 to
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clear the unused bits in the arguments. */
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if (TARGET_THUMB1 && !using_r4)
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{
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using_r4 = true;
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reg = cleared_reg;
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emit_move_insn (gen_rtx_REG (SImode, IP_REGNUM),
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reg);
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}
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tmp = GEN_INT ((((~padding_bits_to_clear[regno]) << 16u) >> 16u));
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emit_move_insn (reg, tmp);
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/* Also fill the top half of the negated
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padding_bits_to_clear. */
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if (((~padding_bits_to_clear[regno]) >> 16) > 0)
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{
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tmp = GEN_INT ((~padding_bits_to_clear[regno]) >> 16);
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emit_insn (gen_rtx_SET (gen_rtx_ZERO_EXTRACT (SImode, reg,
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GEN_INT (16),
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GEN_INT (16)),
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tmp));
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}
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emit_insn (gen_andsi3 (gen_rtx_REG (SImode, regno),
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gen_rtx_REG (SImode, regno),
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reg));
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}
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if (using_r4)
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emit_move_insn (cleared_reg,
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gen_rtx_REG (SImode, IP_REGNUM));
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/* We use right shift and left shift to clear the LSB of the address
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we jump to instead of using bic, to avoid having to use an extra
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register on Thumb-1. */
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tmp = gen_rtx_LSHIFTRT (SImode, cleared_reg, const1_rtx);
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emit_insn (gen_rtx_SET (cleared_reg, tmp));
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tmp = gen_rtx_ASHIFT (SImode, cleared_reg, const1_rtx);
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emit_insn (gen_rtx_SET (cleared_reg, tmp));
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clearing_reg = XEXP (address, 0);
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shift = gen_rtx_LSHIFTRT (SImode, clearing_reg, const1_rtx);
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emit_insn (gen_rtx_SET (clearing_reg, shift));
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shift = gen_rtx_ASHIFT (SImode, clearing_reg, const1_rtx);
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emit_insn (gen_rtx_SET (clearing_reg, shift));
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/* Clearing all registers that leak before doing a non-secure
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/* Clear caller-saved registers that leak before doing a non-secure
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call. */
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for (regno = R0_REGNUM; regno <= maxregno; regno++)
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{
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if (!bitmap_bit_p (to_clear_bitmap, regno))
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continue;
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/* If regno is an even vfp register and its successor is also to
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be cleared, use vmov. */
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if (IS_VFP_REGNUM (regno))
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{
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if (TARGET_VFP_DOUBLE
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&& VFP_REGNO_OK_FOR_DOUBLE (regno)
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&& bitmap_bit_p (to_clear_bitmap, (regno + 1)))
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emit_move_insn (gen_rtx_REG (DFmode, regno++),
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CONST0_RTX (DFmode));
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else
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emit_move_insn (gen_rtx_REG (SFmode, regno),
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CONST0_RTX (SFmode));
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}
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else
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emit_move_insn (gen_rtx_REG (SImode, regno), cleared_reg);
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}
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ip_reg = gen_rtx_REG (SImode, IP_REGNUM);
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cmse_clear_registers (to_clear_bitmap, padding_bits_to_clear,
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NUM_ARG_REGS, ip_reg, clearing_reg);
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seq = get_insns ();
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end_sequence ();
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@ -25152,8 +25215,8 @@ cmse_nonsecure_entry_clear_before_return (void)
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int regno, maxregno = TARGET_HARD_FLOAT ? LAST_VFP_REGNUM : IP_REGNUM;
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uint32_t padding_bits_to_clear = 0;
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auto_sbitmap to_clear_bitmap (maxregno + 1);
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rtx r1_reg, result_rtl, clearing_reg = NULL_RTX;
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tree result_type;
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rtx result_rtl;
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bitmap_clear (to_clear_bitmap);
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bitmap_set_range (to_clear_bitmap, R0_REGNUM, NUM_ARG_REGS);
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@ -25217,84 +25280,22 @@ cmse_nonsecure_entry_clear_before_return (void)
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if (padding_bits_to_clear != 0)
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{
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rtx reg_rtx;
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int to_clear_bitmap_size = SBITMAP_SIZE ((sbitmap) to_clear_bitmap);
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auto_sbitmap to_clear_arg_regs_bitmap (to_clear_bitmap_size);
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/* Padding bits to clear is not 0 so we know we are dealing with
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/* Padding_bits_to_clear is not 0 so we know we are dealing with
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returning a composite type, which only uses r0. Let's make sure that
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r1-r3 is cleared too, we will use r1 as a scratch register. */
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r1-r3 is cleared too. */
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bitmap_clear (to_clear_arg_regs_bitmap);
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bitmap_set_range (to_clear_arg_regs_bitmap, R0_REGNUM + 1,
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NUM_ARG_REGS - 1);
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bitmap_set_range (to_clear_arg_regs_bitmap, R1_REGNUM, NUM_ARG_REGS - 1);
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gcc_assert (bitmap_subset_p (to_clear_arg_regs_bitmap, to_clear_bitmap));
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reg_rtx = gen_rtx_REG (SImode, R1_REGNUM);
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/* Fill the lower half of the negated padding_bits_to_clear. */
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emit_move_insn (reg_rtx,
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GEN_INT ((((~padding_bits_to_clear) << 16u) >> 16u)));
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/* Also fill the top half of the negated padding_bits_to_clear. */
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if (((~padding_bits_to_clear) >> 16) > 0)
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emit_insn (gen_rtx_SET (gen_rtx_ZERO_EXTRACT (SImode, reg_rtx,
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GEN_INT (16),
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GEN_INT (16)),
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GEN_INT ((~padding_bits_to_clear) >> 16)));
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emit_insn (gen_andsi3 (gen_rtx_REG (SImode, R0_REGNUM),
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gen_rtx_REG (SImode, R0_REGNUM),
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reg_rtx));
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}
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for (regno = R0_REGNUM; regno <= maxregno; regno++)
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{
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if (!bitmap_bit_p (to_clear_bitmap, regno))
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continue;
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if (IS_VFP_REGNUM (regno))
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{
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/* If regno is an even vfp register and its successor is also to
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be cleared, use vmov. */
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if (TARGET_VFP_DOUBLE
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&& VFP_REGNO_OK_FOR_DOUBLE (regno)
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&& bitmap_bit_p (to_clear_bitmap, regno + 1))
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{
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emit_move_insn (gen_rtx_REG (DFmode, regno),
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CONST1_RTX (DFmode));
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emit_use (gen_rtx_REG (DFmode, regno));
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regno++;
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}
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else
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{
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emit_move_insn (gen_rtx_REG (SFmode, regno),
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CONST1_RTX (SFmode));
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emit_use (gen_rtx_REG (SFmode, regno));
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}
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}
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else
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{
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if (TARGET_THUMB1)
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{
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if (regno == R0_REGNUM)
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emit_move_insn (gen_rtx_REG (SImode, regno),
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const0_rtx);
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else
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/* R0 has either been cleared before, see code above, or it
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holds a return value, either way it is not secret
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information. */
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emit_move_insn (gen_rtx_REG (SImode, regno),
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gen_rtx_REG (SImode, R0_REGNUM));
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emit_use (gen_rtx_REG (SImode, regno));
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}
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else
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{
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emit_move_insn (gen_rtx_REG (SImode, regno),
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gen_rtx_REG (SImode, LR_REGNUM));
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emit_use (gen_rtx_REG (SImode, regno));
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}
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}
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}
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/* Clear full registers that leak before returning. */
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clearing_reg = gen_rtx_REG (SImode, TARGET_THUMB1 ? R0_REGNUM : LR_REGNUM);
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r1_reg = gen_rtx_REG (SImode, R0_REGNUM + 1);
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cmse_clear_registers (to_clear_bitmap, &padding_bits_to_clear, 1, r1_reg,
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clearing_reg);
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}
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/* Generate pattern *pop_multiple_with_stack_update_and_return if single
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@ -1,3 +1,13 @@
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2017-11-22 Thomas Preud'homme <thomas.preudhomme@arm.com>
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* gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c: Adapt expectations
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to vmov instructions now generated.
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* gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c: Likewise.
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* gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c: Likewise.
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* gcc.target/arm/cmse/mainline/hard/cmse-13.c: Likewise.
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* gcc.target/arm/cmse/mainline/hard/cmse-7.c: Likewise.
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* gcc.target/arm/cmse/mainline/hard/cmse-8.c: Likewise.
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2017-11-22 Tamar Christina <tamar.christina@arm.com>
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* gcc.target/arm/simd/vdot-compile.c: New.
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@ -12,22 +12,22 @@
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/* { dg-final { scan-assembler "mov\tr1, r4" } } */
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/* { dg-final { scan-assembler "mov\tr2, r4" } } */
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/* { dg-final { scan-assembler "mov\tr3, r4" } } */
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/* { dg-final { scan-assembler-not "vldr\.32\ts0, .L" } } */
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/* { dg-final { scan-assembler "vldr\.32\ts1, .L" } } */
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/* { dg-final { scan-assembler-not "vldr\.32\ts2, .L" } } */
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/* { dg-final { scan-assembler-not "vldr\.32\ts3, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts4, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts5, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts6, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts7, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts8, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts9, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts10, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts11, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts12, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts13, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts14, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts15, .L" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts4, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts5, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts6, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts7, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts8, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts9, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts10, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts11, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts12, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts13, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts14, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts15, #1\.0" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
|
|
|
|||
|
|
@ -12,22 +12,22 @@
|
|||
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts0, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts1, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts2, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts3, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts4, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts5, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts6, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts7, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts8, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts9, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts10, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts11, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts12, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts13, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts14, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts15, .L" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts4, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts5, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts6, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts7, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts8, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts9, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts10, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts11, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts12, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts13, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts14, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts15, #1\.0" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
|
|
|
|||
|
|
@ -12,22 +12,22 @@
|
|||
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler-not "vldr\.32\ts0, .L" } } */
|
||||
/* { dg-final { scan-assembler-not "vldr\.32\ts1, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts2, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts3, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts4, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts5, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts6, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts7, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts8, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts9, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts10, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts11, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts12, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts13, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts14, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts15, .L" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts4, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts5, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts6, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts7, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts8, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts9, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts10, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts11, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts12, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts13, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts14, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts15, #1\.0" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
|
|
|
|||
|
|
@ -12,18 +12,18 @@
|
|||
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.32\ts1, .L" } } */
|
||||
/* { dg-final { scan-assembler-not "vldr\.64\td0, .L" } } */
|
||||
/* { dg-final { scan-assembler-not "vldr\.32\ts0, .L" } } */
|
||||
/* { dg-final { scan-assembler-not "vldr\.64\td1, .L" } } */
|
||||
/* { dg-final { scan-assembler-not "vldr\.32\ts2, .L" } } */
|
||||
/* { dg-final { scan-assembler-not "vldr\.32\ts3, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td2, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td3, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td4, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td5, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td6, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td7, .L" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f32\ts1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f64\td0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f64\td1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f32\ts3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td4, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td5, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td6, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td7, #1\.0" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
|
|
|
|||
|
|
@ -12,14 +12,14 @@
|
|||
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td0, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td1, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td2, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td3, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td4, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td5, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td6, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td7, .L" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td4, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td5, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td6, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td7, #1\.0" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
|
|
|
|||
|
|
@ -12,14 +12,14 @@
|
|||
/* { dg-final { scan-assembler "mov\tr1, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr2, r4" } } */
|
||||
/* { dg-final { scan-assembler "mov\tr3, r4" } } */
|
||||
/* { dg-final { scan-assembler-not "vldr\.64\td0, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td1, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td2, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td3, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td4, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td5, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td6, .L" } } */
|
||||
/* { dg-final { scan-assembler "vldr\.64\td7, .L" } } */
|
||||
/* { dg-final { scan-assembler-not "vmov\.f64\td0, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td1, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td2, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td3, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td4, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td5, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td6, #1\.0" } } */
|
||||
/* { dg-final { scan-assembler "vmov\.f64\td7, #1\.0" } } */
|
||||
|
||||
/* Now we check that we use the correct intrinsic to call. */
|
||||
/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue