From fc6c9f75effaf7d1e793a5f5a0fa937668208972 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Fri, 25 May 2007 14:33:27 +0000 Subject: [PATCH] i386.c (__builtin_ia32_vec_ext_v2df): Mark it with MASK_SSE2. gcc/ 2007-05-25 H.J. Lu * config/i386/i386.c (__builtin_ia32_vec_ext_v2df): Mark it with MASK_SSE2. (__builtin_ia32_vec_ext_v2di): Likewise. (__builtin_ia32_vec_ext_v4si): Likewise. (__builtin_ia32_vec_ext_v8hi): Likewise. (__builtin_ia32_vec_ext_v16qi): Likewise. (__builtin_ia32_vec_set_v8hi): Likewise. gcc/testsuite/ 2007-05-25 H.J. Lu * gcc.target/i386/sse2-check.h: New. * gcc.target/i386/sse2-vec-1.c: Likewise. * gcc.target/i386/sse2-vec-2.c: Likewise. * gcc.target/i386/sse2-vec-3.c: Likewise. * gcc.target/i386/sse2-vec-4.c: Likewise. * gcc.target/i386/sse2-vec-5.c: Likewise. * gcc.target/i386/sse2-vec-6.c: Likewise. From-SVN: r125063 --- gcc/ChangeLog | 10 ++++ gcc/config/i386/i386.c | 12 ++-- gcc/testsuite/ChangeLog | 10 ++++ gcc/testsuite/gcc.target/i386/sse2-check.h | 20 +++++++ gcc/testsuite/gcc.target/i386/sse2-vec-1.c | 35 +++++++++++ gcc/testsuite/gcc.target/i386/sse2-vec-2.c | 35 +++++++++++ gcc/testsuite/gcc.target/i386/sse2-vec-3.c | 37 ++++++++++++ gcc/testsuite/gcc.target/i386/sse2-vec-4.c | 41 +++++++++++++ gcc/testsuite/gcc.target/i386/sse2-vec-5.c | 49 +++++++++++++++ gcc/testsuite/gcc.target/i386/sse2-vec-6.c | 69 ++++++++++++++++++++++ 10 files changed, 312 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/sse2-check.h create mode 100644 gcc/testsuite/gcc.target/i386/sse2-vec-1.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-vec-2.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-vec-3.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-vec-4.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-vec-5.c create mode 100644 gcc/testsuite/gcc.target/i386/sse2-vec-6.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e5c7b30ffb4..1a22b1a1760 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2007-05-25 H.J. Lu + + * config/i386/i386.c (__builtin_ia32_vec_ext_v2df): Mark it + with MASK_SSE2. + (__builtin_ia32_vec_ext_v2di): Likewise. + (__builtin_ia32_vec_ext_v4si): Likewise. + (__builtin_ia32_vec_ext_v8hi): Likewise. + (__builtin_ia32_vec_ext_v16qi): Likewise. + (__builtin_ia32_vec_set_v8hi): Likewise. + 2007-05-25 H.J. Lu * config/i386/sse.md (*vec_extractv2di_1_sse2): Correct shift. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 2b3024cc39b..ca5df2dea4d 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -17830,13 +17830,13 @@ ix86_init_mmx_sse_builtins (void) /* Access to the vec_extract patterns. */ ftype = build_function_type_list (double_type_node, V2DF_type_node, integer_type_node, NULL_TREE); - def_builtin (MASK_SSE, "__builtin_ia32_vec_ext_v2df", + def_builtin (MASK_SSE2, "__builtin_ia32_vec_ext_v2df", ftype, IX86_BUILTIN_VEC_EXT_V2DF); ftype = build_function_type_list (long_long_integer_type_node, V2DI_type_node, integer_type_node, NULL_TREE); - def_builtin (MASK_SSE, "__builtin_ia32_vec_ext_v2di", + def_builtin (MASK_SSE2, "__builtin_ia32_vec_ext_v2di", ftype, IX86_BUILTIN_VEC_EXT_V2DI); ftype = build_function_type_list (float_type_node, V4SF_type_node, @@ -17846,12 +17846,12 @@ ix86_init_mmx_sse_builtins (void) ftype = build_function_type_list (intSI_type_node, V4SI_type_node, integer_type_node, NULL_TREE); - def_builtin (MASK_SSE, "__builtin_ia32_vec_ext_v4si", + def_builtin (MASK_SSE2, "__builtin_ia32_vec_ext_v4si", ftype, IX86_BUILTIN_VEC_EXT_V4SI); ftype = build_function_type_list (intHI_type_node, V8HI_type_node, integer_type_node, NULL_TREE); - def_builtin (MASK_SSE, "__builtin_ia32_vec_ext_v8hi", + def_builtin (MASK_SSE2, "__builtin_ia32_vec_ext_v8hi", ftype, IX86_BUILTIN_VEC_EXT_V8HI); ftype = build_function_type_list (intHI_type_node, V4HI_type_node, @@ -17866,7 +17866,7 @@ ix86_init_mmx_sse_builtins (void) ftype = build_function_type_list (intQI_type_node, V16QI_type_node, integer_type_node, NULL_TREE); - def_builtin (MASK_SSE, "__builtin_ia32_vec_ext_v16qi", + def_builtin (MASK_SSE2, "__builtin_ia32_vec_ext_v16qi", ftype, IX86_BUILTIN_VEC_EXT_V16QI); /* Access to the vec_set patterns. */ @@ -17891,7 +17891,7 @@ ix86_init_mmx_sse_builtins (void) ftype = build_function_type_list (V8HI_type_node, V8HI_type_node, intHI_type_node, integer_type_node, NULL_TREE); - def_builtin (MASK_SSE, "__builtin_ia32_vec_set_v8hi", + def_builtin (MASK_SSE2, "__builtin_ia32_vec_set_v8hi", ftype, IX86_BUILTIN_VEC_SET_V8HI); ftype = build_function_type_list (V4HI_type_node, V4HI_type_node, diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 474be38c16e..ed41a7fa0cc 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,13 @@ +2007-05-25 H.J. Lu + + * gcc.target/i386/sse2-check.h: New. + * gcc.target/i386/sse2-vec-1.c: Likewise. + * gcc.target/i386/sse2-vec-2.c: Likewise. + * gcc.target/i386/sse2-vec-3.c: Likewise. + * gcc.target/i386/sse2-vec-4.c: Likewise. + * gcc.target/i386/sse2-vec-5.c: Likewise. + * gcc.target/i386/sse2-vec-6.c: Likewise. + 2007-05-25 Douglas Gregor PR c++/31431 diff --git a/gcc/testsuite/gcc.target/i386/sse2-check.h b/gcc/testsuite/gcc.target/i386/sse2-check.h new file mode 100644 index 00000000000..e6855136c6b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-check.h @@ -0,0 +1,20 @@ +#include +#include + +#include "../../gcc.dg/i386-cpuid.h" + +static void sse2_test (void); + +int +main () +{ + unsigned long cpu_facilities; + + cpu_facilities = i386_cpuid_edx (); + + /* Run SSE2 test only if host has SSE2 support. */ + if ((cpu_facilities & bit_SSE2)) + sse2_test (); + + exit (0); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-vec-1.c b/gcc/testsuite/gcc.target/i386/sse2-vec-1.c new file mode 100644 index 00000000000..f5508145175 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-vec-1.c @@ -0,0 +1,35 @@ +/* { dg-do run { target i?86-*-* x86_64-*-* } } */ +/* { dg-options "-O2 -msse2" } */ + +#include "sse2-check.h" + +#include + +#define msk0 0 +#define msk1 1 + +static void +sse2_test (void) +{ + union + { + __m128d x; + double d[2]; + } val1; + double res[2]; + int masks[2]; + int i; + + val1.d[0] = 23.; + val1.d[1] = 45; + + res[0] = __builtin_ia32_vec_ext_v2df ((__v2df)val1.x, msk0); + res[1] = __builtin_ia32_vec_ext_v2df ((__v2df)val1.x, msk1); + + masks[0] = msk0; + masks[1] = msk1; + + for (i = 0; i < 2; i++) + if (res[i] != val1.d [masks[i]]) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-vec-2.c b/gcc/testsuite/gcc.target/i386/sse2-vec-2.c new file mode 100644 index 00000000000..a5156e04868 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-vec-2.c @@ -0,0 +1,35 @@ +/* { dg-do run { target i?86-*-* x86_64-*-* } } */ +/* { dg-options "-O2 -msse2" } */ + +#include "sse2-check.h" + +#include + +static void +sse2_test (void) +{ + union + { + __m128i x; + char c[16]; + short s[8]; + int i[4]; + long long ll[2]; + } val1; + long long res[2]; + int masks[2]; + int i; + + for (i = 0; i < 16; i++) + val1.c[i] = i; + + res[0] = __builtin_ia32_vec_ext_v2di ((__v2di)val1.x, 0); + res[1] = __builtin_ia32_vec_ext_v2di ((__v2di)val1.x, 1); + + for (i = 0; i < 2; i++) + masks[i] = i; + + for (i = 0; i < 2; i++) + if (res[i] != val1.ll [masks[i]]) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-vec-3.c b/gcc/testsuite/gcc.target/i386/sse2-vec-3.c new file mode 100644 index 00000000000..2e5eb6f1918 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-vec-3.c @@ -0,0 +1,37 @@ +/* { dg-do run { target i?86-*-* x86_64-*-* } } */ +/* { dg-options "-O2 -msse2" } */ + +#include "sse2-check.h" + +#include + +static void +sse2_test (void) +{ + union + { + __m128i x; + char c[16]; + short s[8]; + int i[4]; + long long ll[2]; + } val1; + int res[4]; + int masks[4]; + int i; + + for (i = 0; i < 16; i++) + val1.c[i] = i; + + res[0] = __builtin_ia32_vec_ext_v4si ((__v4si)val1.x, 0); + res[1] = __builtin_ia32_vec_ext_v4si ((__v4si)val1.x, 1); + res[2] = __builtin_ia32_vec_ext_v4si ((__v4si)val1.x, 2); + res[3] = __builtin_ia32_vec_ext_v4si ((__v4si)val1.x, 3); + + for (i = 0; i < 4; i++) + masks[i] = i; + + for (i = 0; i < 4; i++) + if (res[i] != val1.i [masks[i]]) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-vec-4.c b/gcc/testsuite/gcc.target/i386/sse2-vec-4.c new file mode 100644 index 00000000000..ca7d37fc488 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-vec-4.c @@ -0,0 +1,41 @@ +/* { dg-do run { target i?86-*-* x86_64-*-* } } */ +/* { dg-options "-O2 -msse2" } */ + +#include "sse2-check.h" + +#include + +static void +sse2_test (void) +{ + union + { + __m128i x; + char c[16]; + short s[8]; + int i[4]; + long long ll[2]; + } val1; + short res[8]; + int masks[8]; + int i; + + for (i = 0; i < 16; i++) + val1.c[i] = i; + + res[0] = __builtin_ia32_vec_ext_v8hi ((__v8hi)val1.x, 0); + res[1] = __builtin_ia32_vec_ext_v8hi ((__v8hi)val1.x, 1); + res[2] = __builtin_ia32_vec_ext_v8hi ((__v8hi)val1.x, 2); + res[3] = __builtin_ia32_vec_ext_v8hi ((__v8hi)val1.x, 3); + res[4] = __builtin_ia32_vec_ext_v8hi ((__v8hi)val1.x, 4); + res[5] = __builtin_ia32_vec_ext_v8hi ((__v8hi)val1.x, 5); + res[6] = __builtin_ia32_vec_ext_v8hi ((__v8hi)val1.x, 6); + res[7] = __builtin_ia32_vec_ext_v8hi ((__v8hi)val1.x, 7); + + for (i = 0; i < 8; i++) + masks[i] = i; + + for (i = 0; i < 8; i++) + if (res[i] != val1.s [masks[i]]) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-vec-5.c b/gcc/testsuite/gcc.target/i386/sse2-vec-5.c new file mode 100644 index 00000000000..afd7ce81f01 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-vec-5.c @@ -0,0 +1,49 @@ +/* { dg-do run { target i?86-*-* x86_64-*-* } } */ +/* { dg-options "-O2 -msse2" } */ + +#include "sse2-check.h" + +#include + +static void +sse2_test (void) +{ + union + { + __m128i x; + char c[16]; + short s[8]; + int i[4]; + long long ll[2]; + } val1; + char res[16]; + int masks[16]; + int i; + + for (i = 0; i < 16; i++) + val1.c[i] = i; + + res[0] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 0); + res[1] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 1); + res[2] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 2); + res[3] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 3); + res[4] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 4); + res[5] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 5); + res[6] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 6); + res[7] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 7); + res[8] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 8); + res[9] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 9); + res[10] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 10); + res[11] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 11); + res[12] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 12); + res[13] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 13); + res[14] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 14); + res[15] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 15); + + for (i = 0; i < 16; i++) + masks[i] = i; + + for (i = 0; i < 16; i++) + if (res[i] != val1.c [masks[i]]) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse2-vec-6.c b/gcc/testsuite/gcc.target/i386/sse2-vec-6.c new file mode 100644 index 00000000000..13ac364513f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-vec-6.c @@ -0,0 +1,69 @@ +/* { dg-do run { target i?86-*-* x86_64-*-* } } */ +/* { dg-options "-O2 -msse2" } */ + +#include "sse2-check.h" + +#include +#include + +static void +sse2_test (void) +{ + union + { + __m128i x; + char c[16]; + short s[8]; + int i[4]; + long long ll[2]; + } val1, res[16], tmp; + short ins[8] = { 8, 5, 9, 4, 2, 6, 1, 20 }; + int masks[8]; + int i; + + for (i = 0; i < 16; i++) + val1.c[i] = i; + + res[0].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x, + ins[0], 0); + res[1].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x, + ins[0], 1); + res[2].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x, + ins[0], 2); + res[3].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x, + ins[0], 3); + res[4].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x, + ins[0], 4); + res[5].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x, + ins[0], 5); + res[6].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x, + ins[0], 6); + res[7].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x, + ins[0], 7); + + for (i = 0; i < 8; i++) + masks[i] = i; + + for (i = 0; i < 8; i++) + { + tmp.x = val1.x; + tmp.s[masks[i]] = ins[0]; + if (memcmp (&tmp, &res[i], sizeof (tmp))) + abort (); + } + + for (i = 0; i < 8; i++) + { + res[i].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x, + ins[i], 0); + masks[i] = 0; + } + + for (i = 0; i < 8; i++) + { + tmp.x = val1.x; + tmp.s[masks[i]] = ins[i]; + if (memcmp (&tmp, &res[i], sizeof (tmp))) + abort (); + } +}