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re PR target/43653 (ICE at reload1.c:1188 with -O1 -ftree-vectorize and empty struct)

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PR target/43653
	* config/i386/i386.c (ix86_secondary_reload): Handle SSE
	input reload with PLUS RTX.

testsuite/ChangeLog:

	PR target/43653
	* gcc.target/i386/pr43653.c: New test.

From-SVN: r170241
This commit is contained in:
Uros Bizjak 2011-02-17 09:29:50 +01:00
parent 1770aeed11
commit fbf4bfd3f3
4 changed files with 78 additions and 16 deletions
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33
gcc/ChangeLog
View file

@ -1,3 +1,9 @@
2011-02-17 Uros Bizjak <ubizjak@gmail.com>
PR target/43653
* config/i386/i386.c (ix86_secondary_reload): Handle SSE
input reload with PLUS RTX.
2011-02-16 Joseph Myers <joseph@codesourcery.com>
* config/mips/mips.opt (mno-mdmx): Use Var(TARGET_MDMX, 0) instead
@ -101,11 +107,11 @@
2011-02-15 Nathan Froyd <froydnj@codesourcery.com>
* config/iq2000/i2000.h (REG_CLASS_FROM_LETTER): Delete.
(CONST_OK_FOR_LETTER_P, CONST_DOUBLE_OK_FOR_LETTER_P): Delete.
(EXTRA_CONSTRAINT): Delete.
* config/iq2000/constraints.md: New file.
* config/iq2000/iq2000.md: Include it.
* config/iq2000/i2000.h (REG_CLASS_FROM_LETTER): Delete.
(CONST_OK_FOR_LETTER_P, CONST_DOUBLE_OK_FOR_LETTER_P): Delete.
(EXTRA_CONSTRAINT): Delete.
* config/iq2000/constraints.md: New file.
* config/iq2000/iq2000.md: Include it.
(define_insn ""): Delete.
(movsi_internal2, movhi_internal2, movqi_internal2): Delete
unsupported constraint letters from patterns.
@ -211,7 +217,7 @@
* config/stormy16/stormy16.h (REG_CLASS_FROM_LETTER): Delete.
(CONST_OK_FOR_LETTER_P, CONST_DOUBLE_OK_FOR_LETTER_P): Delete.
(EXTRA_CONSTRAINT): Delete.
* config/stormy16/stormy16.c (xstormy16_legitiamte_address_p):
* config/stormy16/stormy16.c (xstormy16_legitimate_address_p):
Un-staticize.
(xstormy16_extra_constraint_p): Delete.
@ -280,18 +286,15 @@
(sparc64_fallback_frame_state): Merge with ...
(sparc_fallback_frame_state): ... this into ...
(MD_FALLBACK_FRAME_STATE_FOR): ... this.
Change new_cfa to long.
Remove regs_off, fpu_save_off, fpu_save.
Define nframes, mctx.
Use IS_SIGHANDLER, handler_args, mctx, walk stack instead of
hardcoded offsets.
Change new_cfa to long. Remove regs_off, fpu_save_off, fpu_save.
Define nframes, mctx. Use IS_SIGHANDLER, handler_args, mctx, walk
stack instead of hardcoded offsets.
2011-02-14 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
* go/gccgo.texi (Top, Import and Export): Fix a typo and a
markup nit.
* go/gccgo.texi (Top, Import and Export): Fix a typo and a markup nit.
2011-02-14 Andriy Gapon <avg@freebsd.org>
2011-02-14 Andriy Gapon <avg@freebsd.org>
PR target/45808
* config/freebsd-spec.h (FBSD_LIB_SPEC): Handle the shared case.
@ -348,7 +351,7 @@
2011-02-12 Iain Sandoe <iains@gcc.gnu.org>
* config/darwin.c (darwin_override_options): Add a hunk missed
from the commit of r168571. Trim comment line lengths and
from the commit of r168571. Trim comment line lengths and
correct indents of the preceding block.
2011-02-12 Iain Sandoe <iains@gcc.gnu.org>

42
gcc/config/i386/i386.c
View file

@ -28293,7 +28293,8 @@ ix86_secondary_reload (bool in_p, rtx x, reg_class_t rclass,
{
/* QImode spills from non-QI registers require
intermediate register on 32bit targets. */
if (!in_p && mode == QImode && !TARGET_64BIT
if (!TARGET_64BIT
&& !in_p && mode == QImode
&& (rclass == GENERAL_REGS
|| rclass == LEGACY_REGS
|| rclass == INDEX_REGS))
@ -28313,6 +28314,45 @@ ix86_secondary_reload (bool in_p, rtx x, reg_class_t rclass,
return Q_REGS;
}
/* This condition handles corner case where an expression involving
pointers gets vectorized. We're trying to use the address of a
stack slot as a vector initializer.
(set (reg:V2DI 74 [ vect_cst_.2 ])
(vec_duplicate:V2DI (reg/f:DI 20 frame)))
Eventually frame gets turned into sp+offset like this:
(set (reg:V2DI 21 xmm0 [orig:74 vect_cst_.2 ] [74])
(vec_duplicate:V2DI (plus:DI (reg/f:DI 7 sp)
(const_int 392 [0x188]))))
That later gets turned into:
(set (reg:V2DI 21 xmm0 [orig:74 vect_cst_.2 ] [74])
(vec_duplicate:V2DI (plus:DI (reg/f:DI 7 sp)
(mem/u/c/i:DI (symbol_ref/u:DI ("*.LC0") [flags 0x2]) [0 S8 A64]))))
We'll have the following reload recorded:
Reload 0: reload_in (DI) =
(plus:DI (reg/f:DI 7 sp)
(mem/u/c/i:DI (symbol_ref/u:DI ("*.LC0") [flags 0x2]) [0 S8 A64]))
reload_out (V2DI) = (reg:V2DI 21 xmm0 [orig:74 vect_cst_.2 ] [74])
SSE_REGS, RELOAD_OTHER (opnum = 0), can't combine
reload_in_reg: (plus:DI (reg/f:DI 7 sp) (const_int 392 [0x188]))
reload_out_reg: (reg:V2DI 21 xmm0 [orig:74 vect_cst_.2 ] [74])
reload_reg_rtx: (reg:V2DI 22 xmm1)
Which isn't going to work since SSE instructions can't handle scalar
additions. Returning GENERAL_REGS forces the addition into integer
register and reload can handle subsequent reloads without problems. */
if (in_p && GET_CODE (x) == PLUS
&& SSE_CLASS_P (rclass)
&& SCALAR_INT_MODE_P (mode))
return GENERAL_REGS;
return NO_REGS;
}

5
gcc/testsuite/ChangeLog
View file

@ -1,3 +1,8 @@
2011-02-17 Uros Bizjak <ubizjak@gmail.com>
PR target/43653
* gcc.target/i386/pr43653.c: New test.
2011-02-11 Dodji Seketeli <dodji@redhat.com>
PR c++/47172

14
gcc/testsuite/gcc.target/i386/pr43653.c Normal file
View file

@ -0,0 +1,14 @@
/* { dg-do compile } */
/* { dg-options "-O1 -ftree-vectorize -msse" } */
typedef struct {} S;
void *foo()
{
S a[64], *p[64];
int i;
for (i = 0; i < 64; i++)
p[i] = &a[i];
return p[0];
}