diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4b58a9b2835..c8949837517 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2012-09-18  Maciej W. Rozycki  <macro@codesourcery.com>
+
+	* config/rs6000/rs6000.c (print_operand) <'c'>: Remove.
+	* config/rs6000/spe.md: Remove a leftover comment.
+
 2012-09-18  Jakub Jelinek  <jakub@redhat.com>
 
 	PR target/54592
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index a5a3848e585..a880e5e3f8a 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -14659,14 +14659,6 @@ print_operand (FILE *file, rtx x, int code)
       /* %c is output_addr_const if a CONSTANT_ADDRESS_P, otherwise
 	 output_operand.  */
 
-    case 'c':
-      /* X is a CR register.  Print the number of the GT bit of the CR.  */
-      if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
-	output_operand_lossage ("invalid %%c value");
-      else
-	fprintf (file, "%d", 4 * (REGNO (x) - CR0_REGNO) + 1);
-      return;
-
     case 'D':
       /* Like 'J' but get to the GT bit only.  */
       gcc_assert (REG_P (x));
diff --git a/gcc/config/rs6000/spe.md b/gcc/config/rs6000/spe.md
index bf59b6cf552..e190be87ac2 100644
--- a/gcc/config/rs6000/spe.md
+++ b/gcc/config/rs6000/spe.md
@@ -2945,8 +2945,6 @@
   "mfspefscr %0"
   [(set_attr "type" "vecsimple")])
 
-;; FP comparison stuff.
-
 ;; Flip the GT bit.
 (define_insn "e500_flip_gt_bit"
   [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")