i386.c (ix86_trampoline_init): Switch arms of if expr.
* config/i386/i386.c (ix86_trampoline_init): Switch arms of if expr. Use offset everywhere. Always assert that offset <= TRAMPOLINE_SIZE. From-SVN: r176173
This commit is contained in:
Uros Bizjak
parent
4d4a9b72be
commit
f9610d205a
2 changed files with 98 additions and 106 deletions
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@ -1,3 +1,8 @@
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2011-07-11 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.c (ix86_trampoline_init): Switch arms of if expr.
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Use offset everywhere. Always assert that offset <= TRAMPOLINE_SIZE.
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2011-07-11 Jakub Jelinek <jakub@redhat.com>
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PR debug/49676
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@ -74,7 +79,7 @@
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after induction variable optimization.
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2011-07-11 Georg-Johann Lay <avr@gjlay.de>
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PR target/39633
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* config/avr/avr.c (notice_update_cc): For ashiftrt:QI, only
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offsets 1..5 set cc0 in a usable way.
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@ -191,8 +196,7 @@
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PR debug/49676
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* dwarf2out.c (size_of_int_loc_descriptor): New function.
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(address_of_int_loc_descriptor): Use it.
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(scompare_loc_descriptor): Optimize EQ/NE comparison with
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constant.
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(scompare_loc_descriptor): Optimize EQ/NE comparison with constant.
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2011-07-09 Richard Henderson <rth@redhat.com>
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@ -249,8 +253,7 @@
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PR target/49621
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* config/rs6000/rs6000.c (rs6000_emit_vector_cond_expr): Use
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CONST0_RTX (dest_mode) instead of const0_rtx as second operand
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of NE.
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CONST0_RTX (dest_mode) instead of const0_rtx as second operand of NE.
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* config/rs6000/vector.md (vector_select_<mode>,
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vector_select_<mode>_uns): Change second operand of NE to
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CONST0_RTX (<MODE>mode) instead of const0_rtx.
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@ -266,7 +269,7 @@
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continue from loop, add one more assert.
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2011-07-08 Georg-Johann Lay <avr@gjlay.de>
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PR target/46779
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* config/avr/avr.c (avr_hard_regno_mode_ok): Rewrite.
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In particular, allow 8-bit values in r28 and r29.
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@ -347,8 +350,7 @@
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* optabs.c (expand_binop): Tighten conditions for doubleword
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expansions.
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(widen_bswap): Assert that mode bitsize and precision are the
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same.
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(widen_bswap): Assert that mode bitsize and precision are the same.
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* stor-layout.c (get_best_mode): Skip modes that have lower
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precision than bitsize.
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* recog.c (simplify_while_replacing): Assert that bitsize and
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@ -545,8 +547,7 @@
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2011-07-07 Joseph Myers <joseph@codesourcery.com>
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* config/i386/t-crtpic, config/i386/t-svr3dbx, config/pa/t-pa:
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Remove.
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* config/i386/t-crtpic, config/i386/t-svr3dbx, config/pa/t-pa: Remove.
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2011-07-07 Bernd Schmidt <bernds@codesourcery.com>
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@ -574,8 +575,7 @@
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2011-07-07 H.J. Lu <hongjiu.lu@intel.com>
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* config.gcc: Support --with-multilib-list for x86 Linux
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targets.
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* config.gcc: Support --with-multilib-list for x86 Linux targets.
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* configure.ac: Mention x86-64 for --with-multilib-list.
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* configure: Regenerated.
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@ -609,8 +609,7 @@
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* config/i386/t-linux64: Support TM_MULTILIB_CONFIG.
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* doc/install.texi: Document --with-multilib-list for
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Linux/x86-64.
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* doc/install.texi: Document --with-multilib-list for Linux/x86-64.
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* doc/invoke.texi: Document -mx32.
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@ -660,24 +659,18 @@
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(TARGET_HAVE_NAMED_SECTIONS): Don't define.
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* common/config/m32c/m32c-common.c: Remove.
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* config.gcc (m32c*-*-*): Set target_has_targetm_common=no.
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* config/alpha/osf5.h (TARGET_HAVE_NAMED_SECTIONS): Define to
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false.
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* config/i386/openbsd.h (TARGET_HAVE_NAMED_SECTIONS): Define to
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false.
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* config/m68k/openbsd.h (TARGET_HAVE_NAMED_SECTIONS): Define to
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false.
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* config/alpha/osf5.h (TARGET_HAVE_NAMED_SECTIONS): Define to false.
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* config/i386/openbsd.h (TARGET_HAVE_NAMED_SECTIONS): Define to false.
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* config/m68k/openbsd.h (TARGET_HAVE_NAMED_SECTIONS): Define to false.
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* config/pa/som.h (TARGET_HAVE_NAMED_SECTIONS): Define to false.
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* config/pdp11/pdp11.h (TARGET_HAVE_NAMED_SECTIONS): Define to
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false.
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* config/vax/openbsd.h (TARGET_HAVE_NAMED_SECTIONS): Define to
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false.
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* config/pdp11/pdp11.h (TARGET_HAVE_NAMED_SECTIONS): Define to false.
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* config/vax/openbsd.h (TARGET_HAVE_NAMED_SECTIONS): Define to false.
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2011-07-07 Jakub Jelinek <jakub@redhat.com>
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PR middle-end/49640
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* gimplify.c (gimplify_compound_lval): For last 2 ARRAY_*REF
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operands and last COMPONENT_REF operand call gimplify_expr on it
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if non-NULL.
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* gimplify.c (gimplify_compound_lval): For last 2 ARRAY_*REF operands
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and last COMPONENT_REF operand call gimplify_expr on it if non-NULL.
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2011-07-07 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
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@ -708,8 +701,7 @@
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(ASM_SPEC): Redefine.
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(DEFAULT_ARCH32_P): Define using TARGET_64BIT_DEFAULT.
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* config/host-solaris.c [__x86_64__] (TRY_EMPTY_VM_SPACE): Reduce.
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* doc/install.texi (Specific, amd64-*-solaris2.1[0-9]*):
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Document.
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* doc/install.texi (Specific, amd64-*-solaris2.1[0-9]*): Document.
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(Specific, i?86-*-solaris2.10): Mention x86_64-*-solaris2.1[0-9]*
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configuration.
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(Specific, x86_64-*-solaris2.1[0-9]*): Document.
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@ -724,7 +716,7 @@
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* config/sparc/sol2.h (ASM_SPEC): Redefine.
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2011-07-07 Georg-Johann Lay <avr@gjlay.de>
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* config/avr/avr.md (*reload_insi): Change predicate #1 to
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const_int_operand. Ditto for peep2 producing this insn.
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Add argument to output_reload_insisf call.
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@ -787,11 +779,10 @@
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Revert:
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* simplify-rtx.c (simplify_const_binary_operation): Use the
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shift_truncation_mask hook instead of performing modulo by
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width. Compare against mode precision, not bitsize.
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shift_truncation_mask hook instead of performing modulo by width.
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Compare against mode precision, not bitsize.
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* combine.c (combine_simplify_rtx, simplify_shift_const_1):
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Use shift_truncation_mask instead of constructing the value
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manually.
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Use shift_truncation_mask instead of constructing the value manually.
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2011-07-06 Michael Meissner <meissner@linux.vnet.ibm.com>
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@ -830,10 +821,8 @@
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(AIX_FUNC_DESC_TOC_64BIT): Ditto.
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(AIX_FUNC_DESC_SC_32BIT): Ditto.
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(AIX_FUNC_DESC_SC_64BIT): Ditto.
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(ptrload): New mode attribute for the appropriate load of a
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pointer.
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(call_indirect_aix32): Delete, rewrite AIX indirect function
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calls.
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(ptrload): New mode attribute for the appropriate load of a pointer.
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(call_indirect_aix32): Delete, rewrite AIX indirect function calls.
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(call_indirect_aix64): Ditto.
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(call_value_indirect_aix32): Ditto.
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(call_value_indirect_aix64): Ditto.
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@ -866,8 +855,7 @@
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2011-07-06 James Greenhalgh <james.greenhalgh@arm.com>
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* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Add
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__ARM_FEATURE_DSP.
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* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Add __ARM_FEATURE_DSP.
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2011-07-06 Basile Starynkevitch <basile@starynkevitch.net>
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@ -906,16 +894,14 @@
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* simplify-rtx.c (mode_signbit_p): Use GET_MODE_PRECISION.
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(val_mode_signbit_p, val_mode_signbit_set_p): New functions.
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(simplify_const_unary_operation, simplify_binary_operation_1,
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simplify_const_binary_operation,
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simplify_const_relational_operation): Use them. Use
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GET_MODE_MASK for masking and sign-extensions.
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simplify_const_binary_operation, simplify_const_relational_operation):
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Use them. Use GET_MODE_MASK for masking and sign-extensions.
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* combine.c (set_nonzero_bits_and_sign_copies, simplify_set,
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combine_simplify_rtx, force_to_mode, reg_nonzero_bits_for_combine,
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simplify_shift_const_1, simplify_comparison): Likewise.
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* expr.c (convert_modes): Likewise.
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* rtlanal.c (nonzero_bits1, canonicalize_condition): Likewise.
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* expmed.c (emit_cstore, emit_store_flag_1, emit_store_flag):
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Likewise.
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* expmed.c (emit_cstore, emit_store_flag_1, emit_store_flag): Likewise.
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* rtl.h (val_mode_signbit_p, val_mode_signbit_set_p): Declare.
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* simplify-rtx.c (simplify_ternary_operation): Remove dead code.
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@ -940,11 +926,10 @@
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2011-07-06 Bernd Schmidt <bernds@codesourcery.com>
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* simplify-rtx.c (simplify_const_binary_operation): Use the
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shift_truncation_mask hook instead of performing modulo by
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width. Compare against mode precision, not bitsize.
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shift_truncation_mask hook instead of performing modulo by width.
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Compare against mode precision, not bitsize.
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* combine.c (combine_simplify_rtx, simplify_shift_const_1):
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Use shift_truncation_mask instead of constructing the value
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manually.
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Use shift_truncation_mask instead of constructing the value manually.
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2011-07-06 H.J. Lu <hongjiu.lu@intel.com>
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@ -1082,10 +1067,10 @@
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2011-07-05 Razya Ladelsky <razya@il.ibm.com>
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PR tree-optimization/49580
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* tree-cfg.c (gimple_duplicate_sese_tail): Remove handling of
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* tree-cfg.c (gimple_duplicate_sese_tail): Remove handling of
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the loop's number of iterations.
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* tree-parloops.c (transform_to_exit_first_loop): Add the
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handling of the loop's number of iterations before the call
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* tree-parloops.c (transform_to_exit_first_loop): Add the
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handling of the loop's number of iterations before the call
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to gimple_duplicate_sese_tail.
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Insert the stmt caclculating the new rhs of the loop's
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condition stmt to the preheader instead of iters_bb.
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@ -1117,9 +1102,8 @@
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* simplify-rtx.c (simplify_unary_operation_1) <case NEG>: When
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negating MULT, negate the second operand instead of first.
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(simplify_binary_operation_1) <case MULT>: If one operand is
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a NEG and the other is MULT, don't attempt to optimize by
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negation of the MULT operand if it only moves the NEG operation
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around.
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a NEG and the other is MULT, don't attempt to optimize by negation
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of the MULT operand if it only moves the NEG operation around.
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PR debug/49602
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* tree-into-ssa.c (rewrite_debug_stmt_uses): Disregard
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@ -22683,54 +22683,14 @@ static void
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ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
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{
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rtx mem, fnaddr;
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int opcode;
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int offset = 0;
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fnaddr = XEXP (DECL_RTL (fndecl), 0);
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if (!TARGET_64BIT)
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if (TARGET_64BIT)
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{
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rtx disp, chain;
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int opcode;
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/* Depending on the static chain location, either load a register
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with a constant, or push the constant to the stack. All of the
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instructions are the same size. */
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chain = ix86_static_chain (fndecl, true);
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if (REG_P (chain))
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{
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if (REGNO (chain) == CX_REG)
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opcode = 0xb9;
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else if (REGNO (chain) == AX_REG)
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opcode = 0xb8;
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else
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gcc_unreachable ();
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}
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else
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opcode = 0x68;
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mem = adjust_address (m_tramp, QImode, 0);
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emit_move_insn (mem, gen_int_mode (opcode, QImode));
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mem = adjust_address (m_tramp, SImode, 1);
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emit_move_insn (mem, chain_value);
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/* Compute offset from the end of the jmp to the target function.
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In the case in which the trampoline stores the static chain on
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the stack, we need to skip the first insn which pushes the
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(call-saved) register static chain; this push is 1 byte. */
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disp = expand_binop (SImode, sub_optab, fnaddr,
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plus_constant (XEXP (m_tramp, 0),
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MEM_P (chain) ? 9 : 10),
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NULL_RTX, 1, OPTAB_DIRECT);
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mem = adjust_address (m_tramp, QImode, 5);
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emit_move_insn (mem, gen_int_mode (0xe9, QImode));
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mem = adjust_address (m_tramp, SImode, 6);
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emit_move_insn (mem, disp);
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}
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else
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{
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int offset = 0, size;
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int size;
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/* Load the function address to r11. Try to load address using
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the shorter movl instead of movabs. We may want to support
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@ -22757,20 +22717,22 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
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offset += 10;
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}
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/* Load static chain using movabs to r10. */
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mem = adjust_address (m_tramp, HImode, offset);
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/* Use the shorter movl instead of movabs for x32. */
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/* Load static chain using movabs to r10. Use the
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shorter movl instead of movabs for x32. */
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if (TARGET_X32)
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{
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opcode = 0xba41;
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size = 6;
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emit_move_insn (mem, gen_int_mode (0xba41, HImode));
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}
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else
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{
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opcode = 0xba49;
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size = 10;
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emit_move_insn (mem, gen_int_mode (0xba49, HImode));
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}
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mem = adjust_address (m_tramp, HImode, offset);
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emit_move_insn (mem, gen_int_mode (opcode, HImode));
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mem = adjust_address (m_tramp, ptr_mode, offset + 2);
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emit_move_insn (mem, chain_value);
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offset += size;
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@ -22780,9 +22742,55 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
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mem = adjust_address (m_tramp, SImode, offset);
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emit_move_insn (mem, gen_int_mode (0x90e3ff49, SImode));
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offset += 4;
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gcc_assert (offset <= TRAMPOLINE_SIZE);
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}
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else
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{
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rtx disp, chain;
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/* Depending on the static chain location, either load a register
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with a constant, or push the constant to the stack. All of the
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instructions are the same size. */
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chain = ix86_static_chain (fndecl, true);
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if (REG_P (chain))
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{
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switch (REGNO (chain))
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{
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case AX_REG:
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opcode = 0xb8; break;
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case CX_REG:
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opcode = 0xb9; break;
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default:
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gcc_unreachable ();
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}
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}
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else
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opcode = 0x68;
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mem = adjust_address (m_tramp, QImode, offset);
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emit_move_insn (mem, gen_int_mode (opcode, QImode));
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mem = adjust_address (m_tramp, SImode, offset + 1);
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emit_move_insn (mem, chain_value);
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offset += 5;
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mem = adjust_address (m_tramp, QImode, offset);
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emit_move_insn (mem, gen_int_mode (0xe9, QImode));
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mem = adjust_address (m_tramp, SImode, offset + 1);
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/* Compute offset from the end of the jmp to the target function.
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In the case in which the trampoline stores the static chain on
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the stack, we need to skip the first insn which pushes the
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(call-saved) register static chain; this push is 1 byte. */
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offset += 5;
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disp = expand_binop (SImode, sub_optab, fnaddr,
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plus_constant (XEXP (m_tramp, 0),
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offset - (MEM_P (chain) ? 1 : 0)),
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NULL_RTX, 1, OPTAB_DIRECT);
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emit_move_insn (mem, disp);
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}
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gcc_assert (offset <= TRAMPOLINE_SIZE);
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#ifdef HAVE_ENABLE_EXECUTE_STACK
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#ifdef CHECK_EXECUTE_STACK_ENABLED
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|
|
|
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Loading…
Add table
Reference in a new issue