RISC-V: Refine the testcases for cond_widen_complicate-3
Rearrange the test cases of cond_widen_complicate-3 by different types into different files, instead of put all types together. Then we can easily reduce the range when asm check fails. The below test suites are passed locally, let's wait online CI says. * The rv64gcv fully regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3.c: Removed. * gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-f16.c: New test. * gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-f32.c: New test. * gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-i16.c: New test. * gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-i32.c: New test. * gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-i8.c: New test. * gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-u16.c: New test. * gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-u32.c: New test. * gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3-u8.c: New test. * gcc.target/riscv/rvv/autovec/cond/cond_widen_complicate-3.h: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
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10 changed files with 93 additions and 36 deletions
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/* { dg-do compile } */
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/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -mrvv-vector-bits=scalable -ffast-math" } */
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#include "cond_widen_complicate-3.h"
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TEST_TYPE (float, _Float16)
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/* { dg-final { scan-assembler-times {\tvfwmul\.vv} 1 } } */
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/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
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/* { dg-do compile } */
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/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d -mrvv-vector-bits=scalable -ffast-math" } */
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#include "cond_widen_complicate-3.h"
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TEST_TYPE (double, float)
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/* { dg-final { scan-assembler-times {\tvfwmul\.vv} 1 } } */
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/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
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/* { dg-do compile } */
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/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d -mrvv-vector-bits=scalable" } */
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#include "cond_widen_complicate-3.h"
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TEST_TYPE (int32_t, int16_t)
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/* { dg-final { scan-assembler-times {\tvwmul\.vv} 1 } } */
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/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
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/* { dg-do compile } */
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/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d -mrvv-vector-bits=scalable" } */
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#include "cond_widen_complicate-3.h"
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TEST_TYPE (int64_t, int32_t)
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/* { dg-final { scan-assembler-times {\tvwmul\.vv} 1 } } */
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/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
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/* { dg-do compile } */
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/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d -mrvv-vector-bits=scalable" } */
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#include "cond_widen_complicate-3.h"
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TEST_TYPE (int16_t, int8_t)
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/* { dg-final { scan-assembler-times {\tvwmul\.vv} 1 } } */
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/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
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/* { dg-do compile } */
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/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d -mrvv-vector-bits=scalable" } */
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#include "cond_widen_complicate-3.h"
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TEST_TYPE (uint32_t, uint16_t)
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/* { dg-final { scan-assembler-times {\tvwmulu\.vv} 1 } } */
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/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
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/* { dg-do compile } */
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/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d -mrvv-vector-bits=scalable" } */
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#include "cond_widen_complicate-3.h"
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TEST_TYPE (uint64_t, uint32_t)
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/* { dg-final { scan-assembler-times {\tvwmulu\.vv} 1 } } */
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/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
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/* { dg-do compile } */
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/* { dg-additional-options "-march=rv32gcv -mabi=ilp32d -mrvv-vector-bits=scalable" } */
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#include "cond_widen_complicate-3.h"
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TEST_TYPE (uint16_t, uint8_t)
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/* { dg-final { scan-assembler-times {\tvwmulu\.vv} 1 } } */
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/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
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/* { dg-do compile } */
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/* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -mrvv-vector-bits=scalable -ffast-math" } */
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#include <stdint-gcc.h>
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#define TEST_TYPE(TYPE1, TYPE2) \
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__attribute__ ((noipa)) void vwadd_##TYPE1_##TYPE2 ( \
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TYPE1 *__restrict dst, TYPE1 *__restrict dst2, TYPE1 *__restrict dst3, \
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TYPE1 *__restrict dst4, TYPE2 *__restrict a, TYPE2 *__restrict b, \
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TYPE2 *__restrict a2, TYPE2 *__restrict b2, int *__restrict pred, int n) \
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{ \
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for (int i = 0; i < n; i++) \
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{ \
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dst[i] = pred[i] ? (TYPE1) a[i] * (TYPE1) b[i] : dst[i]; \
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dst2[i] = pred[i] ? (TYPE1) a2[i] * (TYPE1) b[i] : dst2[i]; \
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dst3[i] = pred[i] ? (TYPE1) a2[i] * (TYPE1) a[i] : dst3[i]; \
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dst4[i] = pred[i] ? (TYPE1) a[i] * (TYPE1) b2[i] : dst4[i]; \
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} \
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}
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#define TEST_ALL() \
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TEST_TYPE (int16_t, int8_t) \
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TEST_TYPE (uint16_t, uint8_t) \
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TEST_TYPE (int32_t, int16_t) \
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TEST_TYPE (uint32_t, uint16_t) \
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TEST_TYPE (int64_t, int32_t) \
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TEST_TYPE (uint64_t, uint32_t) \
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TEST_TYPE (float, _Float16) \
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TEST_TYPE (double, float)
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TEST_ALL ()
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/* { dg-final { scan-assembler-times {\tvwmul\.vv} 12 } } */
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/* { dg-final { scan-assembler-times {\tvwmulu\.vv} 12 } } */
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/* { dg-final { scan-assembler-times {\tvfwmul\.vv} 8 } } */
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/* { dg-final { scan-assembler-not {\tvmerge\.vvm\t} } } */
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#ifndef COND_WIDEN_COMPLICATE_3_H
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#define COND_WIDEN_COMPLICATE_3_H
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#include <stdint-gcc.h>
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#define TEST_TYPE(TYPE1, TYPE2) \
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__attribute__ ((noipa)) void vwadd_##TYPE1##_##TYPE2 ( \
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TYPE1 *__restrict dst, TYPE1 *__restrict dst2, TYPE1 *__restrict dst3, \
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TYPE1 *__restrict dst4, TYPE2 *__restrict a, TYPE2 *__restrict b, \
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TYPE2 *__restrict a2, TYPE2 *__restrict b2, int *__restrict pred, int n) \
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{ \
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for (int i = 0; i < n; i++) \
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{ \
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dst[i] = pred[i] ? (TYPE1) a[i] * (TYPE1) b[i] : dst[i]; \
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dst2[i] = pred[i] ? (TYPE1) a2[i] * (TYPE1) b[i] : dst2[i]; \
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dst3[i] = pred[i] ? (TYPE1) a2[i] * (TYPE1) a[i] : dst3[i]; \
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dst4[i] = pred[i] ? (TYPE1) a[i] * (TYPE1) b2[i] : dst4[i]; \
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} \
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}
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#endif
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