Middle-end: Adjust decrement IV style partial vectorization COST model
Hi, before this patch, a simple conversion case for RVV codegen: foo: ble a2,zero,.L8 addiw a5,a2,-1 li a4,6 bleu a5,a4,.L6 srliw a3,a2,3 slli a3,a3,3 add a3,a3,a0 mv a5,a0 mv a4,a1 vsetivli zero,8,e16,m1,ta,ma .L4: vle8.v v2,0(a5) addi a5,a5,8 vzext.vf2 v1,v2 vse16.v v1,0(a4) addi a4,a4,16 bne a3,a5,.L4 andi a5,a2,-8 beq a2,a5,.L10 .L3: slli a4,a5,32 srli a4,a4,32 subw a2,a2,a5 slli a2,a2,32 slli a5,a4,1 srli a2,a2,32 add a0,a0,a4 add a1,a1,a5 vsetvli zero,a2,e16,m1,ta,ma vle8.v v2,0(a0) vzext.vf2 v1,v2 vse16.v v1,0(a1) .L8: ret .L10: ret .L6: li a5,0 j .L3 This vectorization go through first loop: vsetivli zero,8,e16,m1,ta,ma .L4: vle8.v v2,0(a5) addi a5,a5,8 vzext.vf2 v1,v2 vse16.v v1,0(a4) addi a4,a4,16 bne a3,a5,.L4 Each iteration processes 8 elements. For a scalable vectorization with VLEN > 128 bits CPU, it's ok when VLEN = 128. But, as long as VLEN > 128 bits, it will waste the CPU resources. That is, e.g. VLEN = 256bits. only half of the vector units are working and another half is idle. After investigation, I realize that I forgot to adjust COST for SELECT_VL. So, adjust COST for SELECT_VL styple length vectorization. We adjust COST from 3 to 2. since after this patch: foo: ble a2,zero,.L5 .L3: vsetvli a5,a2,e16,m1,ta,ma -----> SELECT_VL cost. vle8.v v2,0(a0) slli a4,a5,1 -----> additional shift of outcome SELECT_VL for memory address calculation. vzext.vf2 v1,v2 sub a2,a2,a5 vse16.v v1,0(a1) add a0,a0,a5 add a1,a1,a4 bne a2,zero,.L3 .L5: ret This patch is a simple fix that I previous forgot. Ok for trunk ? If not, I am going to adjust cost in backend cost model. PR target/111317 gcc/ChangeLog: * tree-vect-loop.cc (vect_estimate_min_profitable_iters): Adjust for COST for decrement IV. gcc/testsuite/ChangeLog: * gcc.dg/vect/costmodel/riscv/rvv/pr111317.c: New test.
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2 changed files with 26 additions and 3 deletions
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gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr111317.c
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gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr111317.c
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/* { dg-do compile } */
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/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize --param=riscv-autovec-lmul=m1" } */
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void
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foo (char *__restrict a, short *__restrict b, int n)
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{
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for (int i = 0; i < n; i++)
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b[i] = (short) a[i];
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}
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/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]} 1 } } */
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/* { dg-final { scan-assembler-times {vsetvli} 1 } } */
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@ -4870,10 +4870,21 @@ vect_estimate_min_profitable_iters (loop_vec_info loop_vinfo,
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if (partial_load_store_bias != 0)
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body_stmts += 1;
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/* Each may need two MINs and one MINUS to update lengths in body
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for next iteration. */
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unsigned int length_update_cost = 0;
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if (LOOP_VINFO_USING_DECREMENTING_IV_P (loop_vinfo))
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/* For decrement IV style, we use a single SELECT_VL since
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beginning to calculate the number of elements need to be
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processed in current iteration, and a SHIFT operation to
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compute the next memory address instead of adding vectorization
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factor. */
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length_update_cost = 2;
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else
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/* For increment IV stype, Each may need two MINs and one MINUS to
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update lengths in body for next iteration. */
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length_update_cost = 3;
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if (need_iterate_p)
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body_stmts += 3 * num_vectors;
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body_stmts += length_update_cost * num_vectors;
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}
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(void) add_stmt_cost (target_cost_data, prologue_stmts,
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