re PR middle-end/55456 (454.calculix in SPEC CPU 2006 is miscompiled)

2012-11-29  Vladimir Makarov  <vmakarov@redhat.com>

	PR middle-end/55456
	* lra-int.h (lra_new_regno_start): New external.
	* lra.c (lra_new_regno_start): New global.
	(lra): Set up lra_new_regno_start.
	* lra-constraints.c (match_reload): Sync values only for original
	pseudos.

From-SVN: r193948
This commit is contained in:
Vladimir Makarov 2012-11-29 19:00:38 +00:00 committed by Vladimir Makarov
parent e97cae9682
commit f681cf9564
4 changed files with 21 additions and 4 deletions

View file

@ -1,3 +1,12 @@
2012-11-29 Vladimir Makarov <vmakarov@redhat.com>
PR middle-end/55456
* lra-int.h (lra_new_regno_start): New external.
* lra.c (lra_new_regno_start): New global.
(lra): Set up lra_new_regno_start.
* lra-constraints.c (match_reload): Sync values only for original
pseudos.
2012-11-29 Kai Tietz <ktietz@redhat.com>
PR target/53912

View file

@ -685,8 +685,10 @@ match_reload (signed char out, signed char *ins, enum reg_class goal_class,
else
new_out_reg = gen_rtx_SUBREG (outmode, reg, 0);
/* If the input reg is dying here, we can use the same hard
register for REG and IN_RTX. */
if (REG_P (in_rtx)
register for REG and IN_RTX. We do it only for original
pseudos as reload pseudos can die although original
pseudos still live where reload pseudos dies. */
if (REG_P (in_rtx) && (int) REGNO (in_rtx) < lra_new_regno_start
&& find_regno_note (curr_insn, REG_DEAD, REGNO (in_rtx)))
lra_reg_info[REGNO (reg)].val = lra_reg_info[REGNO (in_rtx)].val;
}
@ -712,7 +714,9 @@ match_reload (signed char out, signed char *ins, enum reg_class goal_class,
/* If SUBREG_REG is dying here and sub-registers IN_RTX
and NEW_IN_REG are similar, we can use the same hard
register for REG and SUBREG_REG. */
if (REG_P (subreg_reg) && GET_MODE (subreg_reg) == outmode
if (REG_P (subreg_reg)
&& (int) REGNO (subreg_reg) < lra_new_regno_start
&& GET_MODE (subreg_reg) == outmode
&& SUBREG_BYTE (in_rtx) == SUBREG_BYTE (new_in_reg)
&& find_regno_note (curr_insn, REG_DEAD, REGNO (subreg_reg)))
lra_reg_info[REGNO (reg)].val

View file

@ -295,6 +295,7 @@ extern lra_copy_t lra_get_copy (int);
extern bool lra_former_scratch_p (int);
extern bool lra_former_scratch_operand_p (rtx, int);
extern int lra_new_regno_start;
extern int lra_constraint_new_regno_start;
extern bitmap_head lra_inheritance_pseudos;
extern bitmap_head lra_split_regs;

View file

@ -2151,6 +2151,9 @@ update_inc_notes (void)
/* Set to 1 while in lra. */
int lra_in_progress;
/* Start of pseudo regnos before the LRA. */
int lra_new_regno_start;
/* Start of reload pseudo regnos before the new spill pass. */
int lra_constraint_new_regno_start;
@ -2235,7 +2238,7 @@ lra (FILE *f)
so set up lra_constraint_new_regno_start before its call to
permit changing reg classes for pseudos created by this
simplification. */
lra_constraint_new_regno_start = max_reg_num ();
lra_constraint_new_regno_start = lra_new_regno_start = max_reg_num ();
remove_scratches ();
scratch_p = lra_constraint_new_regno_start != max_reg_num ();