rs6000.c (rs6000_emit_sync): Remove support for operand wrapped in NOT.
* config/rs6000/rs6000.c (rs6000_emit_sync): Remove support for
operand wrapped in NOT. Emit NAND as (ior (not X) (not Y)).
(rs6000_split_atomic_op): Emit NAND as (ior (not X) (not Y)).
* config/rs6000/sync.md (sync_nand<mode>): Represent NAND in RTL.
Call rs6000_emit_sync with CODE=NOT and unmodified operands.
Ignore sub-word case for now.
(sync_nand<mode>_internal): Represent NAND in RTL.
(sync_old_nand<mode): Same.
(sync_old_name<mode>_internal): Same.
(sync_new_nand<mode>): Same.
(sync_new_nand<mode>_internal): Same.
(sync_boolcshort_internal): Expect NAND.
From-SVN: r142285
This commit is contained in:
David Edelsohn
David Edelsohn
parent
71690b03ab
commit
f66f986566
3 changed files with 56 additions and 49 deletions
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@ -1,3 +1,18 @@
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2008-11-29 David Edelsohn <edelsohn@gnu.org>
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* config/rs6000/rs6000.c (rs6000_emit_sync): Remove support for
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operand wrapped in NOT. Emit NAND as (ior (not X) (not Y)).
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(rs6000_split_atomic_op): Emit NAND as (ior (not X) (not Y)).
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* config/rs6000/sync.md (sync_nand<mode>): Represent NAND in RTL.
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Call rs6000_emit_sync with CODE=NOT and unmodified operands.
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Ignore sub-word case for now.
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(sync_nand<mode>_internal): Represent NAND in RTL.
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(sync_old_nand<mode): Same.
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(sync_old_name<mode>_internal): Same.
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(sync_new_nand<mode>): Same.
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(sync_new_nand<mode>_internal): Same.
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(sync_boolcshort_internal): Expect NAND.
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2008-11-28 Richard Guenther <rguenther@suse.de>
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PR tree-optimization/37955
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@ -13826,9 +13826,6 @@ rs6000_emit_sync (enum rtx_code code, enum machine_mode mode,
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if (sync_p)
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emit_insn (gen_lwsync ());
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if (GET_CODE (m) == NOT)
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used_m = XEXP (m, 0);
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else
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used_m = m;
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/* If this is smaller than SImode, we'll have to use SImode with
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@ -13870,10 +13867,7 @@ rs6000_emit_sync (enum rtx_code code, enum machine_mode mode,
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/* It's safe to keep the old alias set of USED_M, because
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the operation is atomic and only affects the original
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USED_M. */
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if (GET_CODE (m) == NOT)
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m = gen_rtx_NOT (SImode, used_m);
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else
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m = used_m;
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m = used_m;
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if (GET_CODE (op) == NOT)
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{
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@ -13893,6 +13887,13 @@ rs6000_emit_sync (enum rtx_code code, enum machine_mode mode,
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emit_insn (gen_ashlsi3 (newop, newop, shift));
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break;
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case NOT: /* NAND */
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newop = expand_binop (SImode, ior_optab,
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oldop, GEN_INT (~imask), NULL_RTX,
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1, OPTAB_LIB_WIDEN);
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emit_insn (gen_rotlsi3 (newop, newop, shift));
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break;
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case AND:
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newop = expand_binop (SImode, ior_optab,
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oldop, GEN_INT (~imask), NULL_RTX,
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@ -13930,19 +13931,6 @@ rs6000_emit_sync (enum rtx_code code, enum machine_mode mode,
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gcc_unreachable ();
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}
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if (GET_CODE (m) == NOT)
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{
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rtx mask, xorm;
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mask = gen_reg_rtx (SImode);
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emit_move_insn (mask, GEN_INT (imask));
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emit_insn (gen_ashlsi3 (mask, mask, shift));
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xorm = gen_rtx_XOR (SImode, used_m, mask);
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/* Depending on the value of 'op', the XOR or the operation might
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be able to be simplified away. */
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newop = simplify_gen_binary (code, SImode, xorm, newop);
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}
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op = newop;
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used_mode = SImode;
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before = gen_reg_rtx (used_mode);
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@ -13960,11 +13948,15 @@ rs6000_emit_sync (enum rtx_code code, enum machine_mode mode,
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after = gen_reg_rtx (used_mode);
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}
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if ((code == PLUS || code == MINUS || GET_CODE (m) == NOT)
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if ((code == PLUS || code == MINUS)
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&& used_mode != mode)
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the_op = op; /* Computed above. */
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else if (GET_CODE (op) == NOT && GET_CODE (m) != NOT)
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the_op = gen_rtx_fmt_ee (code, used_mode, op, m);
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else if (code == NOT)
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the_op = gen_rtx_fmt_ee (IOR, used_mode,
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gen_rtx_NOT (used_mode, m),
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gen_rtx_NOT (used_mode, op));
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else
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the_op = gen_rtx_fmt_ee (code, used_mode, m, op);
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@ -14075,7 +14067,9 @@ rs6000_split_atomic_op (enum rtx_code code, rtx mem, rtx val,
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emit_load_locked (mode, before, mem);
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if (code == NOT)
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x = gen_rtx_AND (mode, gen_rtx_NOT (mode, before), val);
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x = gen_rtx_IOR (mode,
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gen_rtx_NOT (mode, before),
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gen_rtx_NOT (mode, val));
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else if (code == AND)
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x = gen_rtx_UNSPEC (mode, gen_rtvec (2, before, val), UNSPEC_AND);
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else
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@ -210,8 +210,8 @@
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(define_expand "sync_nand<mode>"
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[(parallel [(set (match_operand:INT1 0 "memory_operand" "")
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(unspec:INT1
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[(and:INT1 (not:INT1 (match_dup 0))
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(match_operand:INT1 1 "gpc_reg_operand" ""))]
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[(ior:INT1 (not:INT1 (match_dup 0))
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(not:INT1 (match_operand:INT1 1 "gpc_reg_operand" "")))]
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UNSPEC_ATOMIC))
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(clobber (scratch:INT1))
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(clobber (scratch:CC))])]
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@ -220,11 +220,10 @@
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{
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if (<MODE>mode != SImode && <MODE>mode != DImode)
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{
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FAIL;
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if (PPC405_ERRATUM77)
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FAIL;
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rs6000_emit_sync (AND, <MODE>mode,
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gen_rtx_NOT (<MODE>mode, operands[0]),
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operands[1],
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rs6000_emit_sync (NOT, <MODE>mode, operands[0], operands[1],
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NULL_RTX, NULL_RTX, true);
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DONE;
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}
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@ -233,8 +232,8 @@
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(define_insn_and_split "*sync_nand<mode>_internal"
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[(set (match_operand:GPR 0 "memory_operand" "+Z")
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(unspec:GPR
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[(and:GPR (not:GPR (match_dup 0))
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(match_operand:GPR 1 "gpc_reg_operand" "r"))]
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[(ior:GPR (not:GPR (match_dup 0))
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(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")))]
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UNSPEC_ATOMIC))
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(clobber (match_scratch:GPR 2 "=&r"))
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(clobber (match_scratch:CC 3 "=&x"))]
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@ -316,8 +315,8 @@
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(match_operand:INT1 1 "memory_operand" ""))
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(set (match_dup 1)
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(unspec:INT1
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[(and:INT1 (not:INT1 (match_dup 1))
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(match_operand:INT1 2 "gpc_reg_operand" ""))]
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[(ior:INT1 (not:INT1 (match_dup 1))
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(not:INT1 (match_operand:INT1 2 "gpc_reg_operand" "")))]
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UNSPEC_ATOMIC))
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(clobber (scratch:INT1))
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(clobber (scratch:CC))])]
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@ -326,11 +325,10 @@
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{
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if (<MODE>mode != SImode && <MODE>mode != DImode)
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{
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FAIL;
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if (PPC405_ERRATUM77)
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FAIL;
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rs6000_emit_sync (AND, <MODE>mode,
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gen_rtx_NOT (<MODE>mode, operands[1]),
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operands[2],
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rs6000_emit_sync (NOT, <MODE>mode, operands[1], operands[2],
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operands[0], NULL_RTX, true);
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DONE;
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}
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@ -341,8 +339,8 @@
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(match_operand:GPR 1 "memory_operand" "+Z"))
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(set (match_dup 1)
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(unspec:GPR
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[(and:GPR (not:GPR (match_dup 1))
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(match_operand:GPR 2 "gpc_reg_operand" "r"))]
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[(ior:GPR (not:GPR (match_dup 1))
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(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r")))]
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UNSPEC_ATOMIC))
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(clobber (match_scratch:GPR 3 "=&r"))
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(clobber (match_scratch:CC 4 "=&x"))]
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@ -424,12 +422,13 @@
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(define_expand "sync_new_nand<mode>"
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[(parallel [(set (match_operand:INT1 0 "gpc_reg_operand" "")
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(and:INT1
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(ior:INT1
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(not:INT1 (match_operand:INT1 1 "memory_operand" ""))
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(match_operand:INT1 2 "gpc_reg_operand" "")))
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(not:INT1 (match_operand:INT1 2 "gpc_reg_operand" ""))))
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(set (match_dup 1)
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(unspec:INT1
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[(and:INT1 (not:INT1 (match_dup 1)) (match_dup 2))]
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[(ior:INT1 (not:INT1 (match_dup 1))
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(not:INT1 (match_dup 2)))]
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UNSPEC_ATOMIC))
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(clobber (scratch:INT1))
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(clobber (scratch:CC))])]
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@ -438,11 +437,10 @@
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{
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if (<MODE>mode != SImode && <MODE>mode != DImode)
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{
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FAIL;
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if (PPC405_ERRATUM77)
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FAIL;
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rs6000_emit_sync (AND, <MODE>mode,
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gen_rtx_NOT (<MODE>mode, operands[1]),
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operands[2],
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rs6000_emit_sync (NOT, <MODE>mode, operands[1], operands[2],
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NULL_RTX, operands[0], true);
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DONE;
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}
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@ -450,12 +448,12 @@
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(define_insn_and_split "*sync_new_nand<mode>_internal"
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[(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
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(and:GPR
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(ior:GPR
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(not:GPR (match_operand:GPR 1 "memory_operand" "+Z"))
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(match_operand:GPR 2 "gpc_reg_operand" "r")))
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(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r"))))
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(set (match_dup 1)
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(unspec:GPR
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[(and:GPR (not:GPR (match_dup 1)) (match_dup 2))]
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[(ior:GPR (not:GPR (match_dup 1)) (not:GPR (match_dup 2)))]
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UNSPEC_ATOMIC))
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(clobber (match_scratch:GPR 3 "=&r"))
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(clobber (match_scratch:CC 4 "=&x"))]
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@ -580,10 +578,10 @@
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; Likewise, operand 5 is in practice either <= 2^16 or it is a register.
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(define_insn "*sync_boolcshort_internal"
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[(set (match_operand:SI 2 "gpc_reg_operand" "=&r")
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(match_operator:SI 4 "boolean_operator"
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[(xor:SI (match_operand:SI 0 "memory_operand" "+Z")
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(match_operand:SI 5 "logical_operand" "rK"))
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(match_operand:SI 1 "gpc_reg_operand" "r")]))
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(match_operator:SI 4 "boolean_or_operator"
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[(xor:SI (not:SI (match_operand:SI 0 "memory_operand" "+Z"))
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(not:SI (match_operand:SI 5 "logical_operand" "rK")))
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(match_operand:SI 1 "gpc_reg_operand" "r")]))
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(set (match_operand:SI 3 "gpc_reg_operand" "=&b") (match_dup 0))
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(set (match_dup 0) (unspec:SI [(match_dup 4)] UNSPEC_SYNC_OP))
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(clobber (match_scratch:CC 6 "=&x"))]
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