Change MODE_BITSIZE to MODE_PRECISION for MODE_VECTOR_BOOL.

RISC-V lowers the TYPE_PRECISION for MODE_VECTOR_BOOL vectors in order
to distinguish between VNx1BI, VNx2BI, VNx4BI and VNx8BI.

This patch adjusts uses of MODE_VECTOR_BOOL to use GET_MODE_PRECISION
instead of GET_MODE_BITSIZE.

The RISC-V tests are provided by Juzhe.

Co-Authored-By: Juzhe-Zhong <juzhe.zhong@rivai.ai>

gcc/c-family/ChangeLog:

	* c-common.cc (c_common_type_for_mode): Use GET_MODE_PRECISION.

gcc/ChangeLog:

	* simplify-rtx.cc (native_encode_rtx): Ditto.
	(native_decode_vector_rtx): Ditto.
	(simplify_const_vector_byte_offset): Ditto.
	(simplify_const_vector_subreg): Ditto.
	* tree.cc (build_truth_vector_type_for_mode): Ditto.
	* varasm.cc (output_constant_pool_2): Ditto.

gcc/fortran/ChangeLog:

	* trans-types.cc (gfc_type_for_mode): Ditto.

gcc/go/ChangeLog:

	* go-lang.cc (go_langhook_type_for_mode): Ditto.

gcc/lto/ChangeLog:

	* lto-lang.cc (lto_type_for_mode): Ditto.

gcc/rust/ChangeLog:

	* backend/rust-tree.cc (c_common_type_for_mode): Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-1.c: New test.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-10.c: New test.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-11.c: New test.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-12.c: New test.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-13.c: New test.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-14.c: New test.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-2.c: New test.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-3.c: New test.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-4.c: New test.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-5.c: New test.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-6.c: New test.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-7.c: New test.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-8.c: New test.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/bitmask-9.c: New test.
This commit is contained in:
Robin Dapp 2023-06-28 20:59:29 +02:00
parent 5f5e37dcbc
commit f4a2ae2338
22 changed files with 367 additions and 12 deletions

View file

@ -2458,7 +2458,7 @@ c_common_type_for_mode (machine_mode mode, int unsignedp)
else if (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL
&& valid_vector_subparts_p (GET_MODE_NUNITS (mode)))
{
unsigned int elem_bits = vector_element_size (GET_MODE_BITSIZE (mode),
unsigned int elem_bits = vector_element_size (GET_MODE_PRECISION (mode),
GET_MODE_NUNITS (mode));
tree bool_type = build_nonstandard_boolean_type (elem_bits);
return build_vector_type_for_mode (bool_type, mode);

View file

@ -3403,7 +3403,7 @@ gfc_type_for_mode (machine_mode mode, int unsignedp)
else if (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL
&& valid_vector_subparts_p (GET_MODE_NUNITS (mode)))
{
unsigned int elem_bits = vector_element_size (GET_MODE_BITSIZE (mode),
unsigned int elem_bits = vector_element_size (GET_MODE_PRECISION (mode),
GET_MODE_NUNITS (mode));
tree bool_type = build_nonstandard_boolean_type (elem_bits);
return build_vector_type_for_mode (bool_type, mode);

View file

@ -414,7 +414,7 @@ go_langhook_type_for_mode (machine_mode mode, int unsignedp)
if (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL
&& valid_vector_subparts_p (GET_MODE_NUNITS (mode)))
{
unsigned int elem_bits = vector_element_size (GET_MODE_BITSIZE (mode),
unsigned int elem_bits = vector_element_size (GET_MODE_PRECISION (mode),
GET_MODE_NUNITS (mode));
tree bool_type = build_nonstandard_boolean_type (elem_bits);
return build_vector_type_for_mode (bool_type, mode);

View file

@ -1050,7 +1050,7 @@ lto_type_for_mode (machine_mode mode, int unsigned_p)
else if (GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL
&& valid_vector_subparts_p (GET_MODE_NUNITS (mode)))
{
unsigned int elem_bits = vector_element_size (GET_MODE_BITSIZE (mode),
unsigned int elem_bits = vector_element_size (GET_MODE_PRECISION (mode),
GET_MODE_NUNITS (mode));
tree bool_type = build_nonstandard_boolean_type (elem_bits);
return build_vector_type_for_mode (bool_type, mode);

View file

@ -5320,7 +5320,7 @@ c_common_type_for_mode (machine_mode mode, int unsignedp)
&& valid_vector_subparts_p (GET_MODE_NUNITS (mode)))
{
unsigned int elem_bits
= vector_element_size (GET_MODE_BITSIZE (mode), GET_MODE_NUNITS (mode));
= vector_element_size (GET_MODE_PRECISION (mode), GET_MODE_NUNITS (mode));
tree bool_type = build_nonstandard_boolean_type (elem_bits);
return build_vector_type_for_mode (bool_type, mode);
}

View file

@ -7076,7 +7076,7 @@ native_encode_rtx (machine_mode mode, rtx x, vec<target_unit> &bytes,
/* CONST_VECTOR_ELT follows target memory order, so no shuffling
is necessary. The only complication is that MODE_VECTOR_BOOL
vectors can have several elements per byte. */
unsigned int elt_bits = vector_element_size (GET_MODE_BITSIZE (mode),
unsigned int elt_bits = vector_element_size (GET_MODE_PRECISION (mode),
GET_MODE_NUNITS (mode));
unsigned int elt = first_byte * BITS_PER_UNIT / elt_bits;
if (elt_bits < BITS_PER_UNIT)
@ -7222,7 +7222,7 @@ native_decode_vector_rtx (machine_mode mode, const vec<target_unit> &bytes,
{
rtx_vector_builder builder (mode, npatterns, nelts_per_pattern);
unsigned int elt_bits = vector_element_size (GET_MODE_BITSIZE (mode),
unsigned int elt_bits = vector_element_size (GET_MODE_PRECISION (mode),
GET_MODE_NUNITS (mode));
if (elt_bits < BITS_PER_UNIT)
{
@ -7359,7 +7359,7 @@ simplify_const_vector_byte_offset (rtx x, poly_uint64 byte)
{
/* Cope with MODE_VECTOR_BOOL by operating on bits rather than bytes. */
machine_mode mode = GET_MODE (x);
unsigned int elt_bits = vector_element_size (GET_MODE_BITSIZE (mode),
unsigned int elt_bits = vector_element_size (GET_MODE_PRECISION (mode),
GET_MODE_NUNITS (mode));
/* The number of bits needed to encode one element from each pattern. */
unsigned int sequence_bits = CONST_VECTOR_NPATTERNS (x) * elt_bits;
@ -7414,10 +7414,10 @@ simplify_const_vector_subreg (machine_mode outermode, rtx x,
/* Cope with MODE_VECTOR_BOOL by operating on bits rather than bytes. */
unsigned int x_elt_bits
= vector_element_size (GET_MODE_BITSIZE (innermode),
= vector_element_size (GET_MODE_PRECISION (innermode),
GET_MODE_NUNITS (innermode));
unsigned int out_elt_bits
= vector_element_size (GET_MODE_BITSIZE (outermode),
= vector_element_size (GET_MODE_PRECISION (outermode),
GET_MODE_NUNITS (outermode));
/* The number of bits needed to encode one element from every pattern

View file

@ -0,0 +1,23 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3" } */
#include <stdint-gcc.h>
#include <assert.h>
#define N 16
int
main ()
{
int mask[N] = {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1};
int64_t out[N] = {0};
for (int i = 0; i < N; ++i)
if (mask[i])
out[i] = i;
for (int i = 0; i < N; ++i)
{
if (mask[i])
assert (out[i] == i);
else
assert (out[i] == 0);
}
}

View file

@ -0,0 +1,22 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3 --param riscv-autovec-lmul=m2" } */
#include <stdint-gcc.h>
#include <assert.h>
#define N 16
int
main ()
{
int mask[N] = {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1};
int8_t out[N] = {0};
for (int i = 0; i < N; ++i)
if (mask[i])
out[i] = i;
for (int i = 0; i < N; ++i)
{
if (mask[i])
assert (out[i] == i);
else
assert (out[i] == 0);
}
}

View file

@ -0,0 +1,23 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3" } */
#include <stdint-gcc.h>
#include <assert.h>
#define N 4
int
main ()
{
int mask[N] = {0, 1, 0, 1};
int out[N] = {0};
for (int i = 0; i < N; ++i)
if (mask[i])
out[i] = i;
for (int i = 0; i < N; ++i)
{
if (mask[i])
assert (out[i] == i);
else
assert (out[i] == 0);
}
}

View file

@ -0,0 +1,23 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3 --param riscv-autovec-lmul=m2" } */
#include <stdint-gcc.h>
#include <assert.h>
#define N 8
int
main ()
{
int mask[N] = {0, 1, 0, 1, 0, 1, 0, 1};
int out[N] = {0};
for (int i = 0; i < N; ++i)
if (mask[i])
out[i] = i;
for (int i = 0; i < N; ++i)
{
if (mask[i])
assert (out[i] == i);
else
assert (out[i] == 0);
}
}

View file

@ -0,0 +1,23 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3 --param riscv-autovec-lmul=m4" } */
#include <stdint-gcc.h>
#include <assert.h>
#define N 16
int
main ()
{
int mask[N] = {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1};
int out[N] = {0};
for (int i = 0; i < N; ++i)
if (mask[i])
out[i] = i;
for (int i = 0; i < N; ++i)
{
if (mask[i])
assert (out[i] == i);
else
assert (out[i] == 0);
}
}

View file

@ -0,0 +1,24 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3 --param riscv-autovec-lmul=m8" } */
#include <stdint-gcc.h>
#include <assert.h>
#define N 32
int
main ()
{
int mask[N] = {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1};
int out[N] = {0};
for (int i = 0; i < N; ++i)
if (mask[i])
out[i] = i;
for (int i = 0; i < N; ++i)
{
if (mask[i])
assert (out[i] == i);
else
assert (out[i] == 0);
}
}

View file

@ -0,0 +1,23 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3" } */
#include <stdint-gcc.h>
#include <assert.h>
#define N 16
int
main ()
{
int mask[N] = {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1};
int out[N] = {0};
for (int i = 0; i < N; ++i)
if (mask[i])
out[i] = i;
for (int i = 0; i < N; ++i)
{
if (mask[i])
assert (out[i] == i);
else
assert (out[i] == 0);
}
}

View file

@ -0,0 +1,23 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3" } */
#include <stdint-gcc.h>
#include <assert.h>
#define N 16
int
main ()
{
int16_t mask[N] = {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1};
int16_t out[N] = {0};
for (int16_t i = 0; i < N; ++i)
if (mask[i])
out[i] = i;
for (int16_t i = 0; i < N; ++i)
{
if (mask[i])
assert (out[i] == i);
else
assert (out[i] == 0);
}
}

View file

@ -0,0 +1,23 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax -O3" } */
#include <stdint-gcc.h>
#include <assert.h>
#define N 16
int
main ()
{
int8_t mask[N] = {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1};
int8_t out[N] = {0};
for (int8_t i = 0; i < N; ++i)
if (mask[i])
out[i] = i;
for (int8_t i = 0; i < N; ++i)
{
if (mask[i])
assert (out[i] == i);
else
assert (out[i] == 0);
}
}

View file

@ -0,0 +1,25 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax --param riscv-autovec-lmul=m2 -O3" } */
#include <stdint-gcc.h>
#include <assert.h>
#define N 32
int
main ()
{
int8_t mask[N] = {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1};
int8_t out[N] = {0};
for (int8_t i = 0; i < N; ++i)
if (mask[i])
out[i] = i;
for (int8_t i = 0; i < N; ++i)
{
if (mask[i])
assert (out[i] == i);
else
assert (out[i] == 0);
}
}

View file

@ -0,0 +1,27 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax --param riscv-autovec-lmul=m4 -O3" } */
#include <stdint-gcc.h>
#include <assert.h>
#define N 64
int
main ()
{
int8_t mask[N] = {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1};
int8_t out[N] = {0};
for (int8_t i = 0; i < N; ++i)
if (mask[i])
out[i] = i;
for (int8_t i = 0; i < N; ++i)
{
if (mask[i])
assert (out[i] == i);
else
assert (out[i] == 0);
}
}

View file

@ -0,0 +1,30 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax --param riscv-autovec-lmul=m8 -O3" } */
#include <stdint-gcc.h>
#include <assert.h>
#define N 128
int
main ()
{
uint8_t mask[N]
= {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1};
uint8_t out[N] = {0};
for (uint8_t i = 0; i < N; ++i)
if (mask[i])
out[i] = i;
for (uint8_t i = 0; i < N; ++i)
{
if (mask[i])
assert (out[i] == i);
else
assert (out[i] == 0);
}
}

View file

@ -0,0 +1,30 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax --param riscv-autovec-lmul=m8 -O3" } */
#include <stdint-gcc.h>
#include <assert.h>
#define N 128
int
main ()
{
int mask[N]
= {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1};
int out[N] = {0};
for (int i = 0; i < N; ++i)
if (mask[i])
out[i] = i;
for (int i = 0; i < N; ++i)
{
if (mask[i])
assert (out[i] == i);
else
assert (out[i] == 0);
}
}

View file

@ -0,0 +1,30 @@
/* { dg-do run { target { riscv_vector } } } */
/* { dg-options "--param riscv-autovec-preference=fixed-vlmax --param riscv-autovec-lmul=m8 -O3" } */
#include <stdint-gcc.h>
#include <assert.h>
#define N 128
int
main ()
{
int64_t mask[N]
= {0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1};
int64_t out[N] = {0};
for (int i = 0; i < N; ++i)
if (mask[i])
out[i] = i;
for (int i = 0; i < N; ++i)
{
if (mask[i])
assert (out[i] == i);
else
assert (out[i] == 0);
}
}

View file

@ -10143,7 +10143,7 @@ build_truth_vector_type_for_mode (poly_uint64 nunits, machine_mode mask_mode)
unsigned HOST_WIDE_INT esize;
if (VECTOR_MODE_P (mask_mode))
{
poly_uint64 vsize = GET_MODE_BITSIZE (mask_mode);
poly_uint64 vsize = GET_MODE_PRECISION (mask_mode);
esize = vector_element_size (vsize, nunits);
}
else

View file

@ -4061,11 +4061,17 @@ output_constant_pool_2 (fixed_size_mode mode, rtx x, unsigned int align)
whole element. Often this is byte_mode and contains more
than one element. */
unsigned int nelts = GET_MODE_NUNITS (mode);
unsigned int elt_bits = GET_MODE_BITSIZE (mode) / nelts;
unsigned int elt_bits = GET_MODE_PRECISION (mode) / nelts;
unsigned int int_bits = MAX (elt_bits, BITS_PER_UNIT);
scalar_int_mode int_mode = int_mode_for_size (int_bits, 0).require ();
unsigned int mask = GET_MODE_MASK (GET_MODE_INNER (mode));
/* We allow GET_MODE_PRECISION (mode) <= GET_MODE_BITSIZE (mode) but
only properly handle cases where the difference is less than a
byte. */
gcc_assert (GET_MODE_BITSIZE (mode) - GET_MODE_PRECISION (mode) <
BITS_PER_UNIT);
/* Build the constant up one integer at a time. */
unsigned int elts_per_int = int_bits / elt_bits;
for (unsigned int i = 0; i < nelts; i += elts_per_int)