re PR target/49903 ([avr] Redundant comparisons in binary-search switch/case expansion)
* PR target/49903 * config/avr/avr.md (UNSPEC_IDENTITY): New c_enum. (branch_unspec): New insn. (branch): Beauty farm. * config/avr/avr.c (compare_condition): Use JUMP_P. Test SET_SRC to be IF_THEN_ELSE. (avr_compare_pattern, avr_reorg_remove_redundant_compare): New static functions. (avr_reorg): Use them. Use next_real_insn instead of NEXT_INSN. Use CONST_INT_P. Beauty. From-SVN: r177744
This commit is contained in:
Georg-Johann Lay
Georg-Johann Lay
parent
fdf0337727
commit
f371377833
3 changed files with 294 additions and 75 deletions
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@ -1,3 +1,16 @@
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2011-08-14 Georg-Johann Lay <avr@gjlay.de>
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* PR target/49903
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* config/avr/avr.md (UNSPEC_IDENTITY): New c_enum.
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(branch_unspec): New insn.
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(branch): Beauty farm.
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* config/avr/avr.c (compare_condition): Use JUMP_P. Test SET_SRC
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to be IF_THEN_ELSE.
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(avr_compare_pattern, avr_reorg_remove_redundant_compare):
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New static functions.
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(avr_reorg): Use them. Use next_real_insn instead of NEXT_INSN.
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Use CONST_INT_P. Beauty.
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2011-08-12 David Li <davidxl@google.com>
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* cp/class.c (update_vtable_entry_for_fn): Set
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@ -2947,15 +2947,17 @@ static RTX_CODE
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compare_condition (rtx insn)
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{
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rtx next = next_real_insn (insn);
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RTX_CODE cond = UNKNOWN;
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if (next && GET_CODE (next) == JUMP_INSN)
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if (next && JUMP_P (next))
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{
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rtx pat = PATTERN (next);
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rtx src = SET_SRC (pat);
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rtx t = XEXP (src, 0);
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cond = GET_CODE (t);
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if (IF_THEN_ELSE == GET_CODE (src))
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return GET_CODE (XEXP (src, 0));
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}
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return cond;
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return UNKNOWN;
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}
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/* Returns nonzero if INSN is a tst insn that only tests the sign. */
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@ -6046,82 +6048,265 @@ avr_normalize_condition (RTX_CODE condition)
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}
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}
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/* This function optimizes conditional jumps. */
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/* Helper function for `avr_reorg'. */
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static rtx
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avr_compare_pattern (rtx insn)
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{
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rtx pattern = single_set (insn);
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if (pattern
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&& NONJUMP_INSN_P (insn)
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&& SET_DEST (pattern) == cc0_rtx
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&& GET_CODE (SET_SRC (pattern)) == COMPARE)
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{
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return pattern;
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}
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return NULL_RTX;
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}
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/* Helper function for `avr_reorg'. */
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/* Expansion of switch/case decision trees leads to code like
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cc0 = compare (Reg, Num)
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if (cc0 == 0)
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goto L1
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cc0 = compare (Reg, Num)
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if (cc0 > 0)
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goto L2
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The second comparison is superfluous and can be deleted.
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The second jump condition can be transformed from a
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"difficult" one to a "simple" one because "cc0 > 0" and
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"cc0 >= 0" will have the same effect here.
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This function relies on the way switch/case is being expaned
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as binary decision tree. For example code see PR 49903.
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Return TRUE if optimization performed.
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Return FALSE if nothing changed.
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INSN1 is a comparison, i.e. avr_compare_pattern != 0.
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We don't want to do this in text peephole because it is
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tedious to work out jump offsets there and the second comparison
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might have been transormed by `avr_reorg'.
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RTL peephole won't do because peephole2 does not scan across
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basic blocks. */
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static bool
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avr_reorg_remove_redundant_compare (rtx insn1)
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{
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rtx comp1, ifelse1, xcond1, branch1;
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rtx comp2, ifelse2, xcond2, branch2, insn2;
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enum rtx_code code;
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rtx jump, target, cond;
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/* Look out for: compare1 - branch1 - compare2 - branch2 */
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branch1 = next_nonnote_nondebug_insn (insn1);
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if (!branch1 || !JUMP_P (branch1))
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return false;
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insn2 = next_nonnote_nondebug_insn (branch1);
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if (!insn2 || !avr_compare_pattern (insn2))
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return false;
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branch2 = next_nonnote_nondebug_insn (insn2);
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if (!branch2 || !JUMP_P (branch2))
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return false;
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comp1 = avr_compare_pattern (insn1);
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comp2 = avr_compare_pattern (insn2);
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xcond1 = single_set (branch1);
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xcond2 = single_set (branch2);
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if (!comp1 || !comp2
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|| !rtx_equal_p (comp1, comp2)
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|| !xcond1 || SET_DEST (xcond1) != pc_rtx
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|| !xcond2 || SET_DEST (xcond2) != pc_rtx
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|| IF_THEN_ELSE != GET_CODE (SET_SRC (xcond1))
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|| IF_THEN_ELSE != GET_CODE (SET_SRC (xcond2)))
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{
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return false;
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}
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comp1 = SET_SRC (comp1);
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ifelse1 = SET_SRC (xcond1);
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ifelse2 = SET_SRC (xcond2);
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/* comp<n> is COMPARE now and ifelse<n> is IF_THEN_ELSE. */
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if (EQ != GET_CODE (XEXP (ifelse1, 0))
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|| !REG_P (XEXP (comp1, 0))
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|| !CONST_INT_P (XEXP (comp1, 1))
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|| XEXP (ifelse1, 2) != pc_rtx
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|| XEXP (ifelse2, 2) != pc_rtx
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|| LABEL_REF != GET_CODE (XEXP (ifelse1, 1))
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|| LABEL_REF != GET_CODE (XEXP (ifelse2, 1))
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|| !COMPARISON_P (XEXP (ifelse2, 0))
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|| cc0_rtx != XEXP (XEXP (ifelse1, 0), 0)
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|| cc0_rtx != XEXP (XEXP (ifelse2, 0), 0)
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|| const0_rtx != XEXP (XEXP (ifelse1, 0), 1)
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|| const0_rtx != XEXP (XEXP (ifelse2, 0), 1))
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{
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return false;
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}
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/* We filtered the insn sequence to look like
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(set (cc0)
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(compare (reg:M N)
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(const_int VAL)))
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(set (pc)
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(if_then_else (eq (cc0)
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(const_int 0))
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(label_ref L1)
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(pc)))
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(set (cc0)
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(compare (reg:M N)
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(const_int VAL)))
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(set (pc)
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(if_then_else (CODE (cc0)
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(const_int 0))
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(label_ref L2)
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(pc)))
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*/
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code = GET_CODE (XEXP (ifelse2, 0));
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/* Map GT/GTU to GE/GEU which is easier for AVR.
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The first two instructions compare/branch on EQ
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so we may replace the difficult
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if (x == VAL) goto L1;
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if (x > VAL) goto L2;
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with easy
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if (x == VAL) goto L1;
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if (x >= VAL) goto L2;
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Similarly, replace LE/LEU by LT/LTU. */
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switch (code)
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{
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case EQ:
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case LT: case LTU:
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case GE: case GEU:
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break;
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case LE: case LEU:
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case GT: case GTU:
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code = avr_normalize_condition (code);
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break;
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default:
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return false;
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}
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/* Wrap the branches into UNSPECs so they won't be changed or
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optimized in the remainder. */
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target = XEXP (XEXP (ifelse1, 1), 0);
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cond = XEXP (ifelse1, 0);
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jump = emit_jump_insn_after (gen_branch_unspec (target, cond), insn1);
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JUMP_LABEL (jump) = JUMP_LABEL (branch1);
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target = XEXP (XEXP (ifelse2, 1), 0);
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cond = gen_rtx_fmt_ee (code, VOIDmode, cc0_rtx, const0_rtx);
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jump = emit_jump_insn_after (gen_branch_unspec (target, cond), insn2);
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JUMP_LABEL (jump) = JUMP_LABEL (branch2);
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/* The comparisons in insn1 and insn2 are exactly the same;
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insn2 is superfluous so delete it. */
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delete_insn (insn2);
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delete_insn (branch1);
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delete_insn (branch2);
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return true;
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}
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/* Implement `TARGET_MACHINE_DEPENDENT_REORG'. */
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/* Optimize conditional jumps. */
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static void
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avr_reorg (void)
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{
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rtx insn, pattern;
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rtx insn = get_insns();
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for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
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for (insn = next_real_insn (insn); insn; insn = next_real_insn (insn))
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{
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if (! (GET_CODE (insn) == INSN
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|| GET_CODE (insn) == CALL_INSN
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|| GET_CODE (insn) == JUMP_INSN)
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|| !single_set (insn))
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continue;
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rtx pattern = avr_compare_pattern (insn);
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if (!pattern)
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continue;
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pattern = PATTERN (insn);
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if (optimize
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&& avr_reorg_remove_redundant_compare (insn))
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{
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continue;
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}
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if (GET_CODE (pattern) == PARALLEL)
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pattern = XVECEXP (pattern, 0, 0);
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if (GET_CODE (pattern) == SET
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&& SET_DEST (pattern) == cc0_rtx
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&& compare_diff_p (insn))
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if (compare_diff_p (insn))
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{
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if (GET_CODE (SET_SRC (pattern)) == COMPARE)
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{
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/* Now we work under compare insn. */
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pattern = SET_SRC (pattern);
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if (true_regnum (XEXP (pattern,0)) >= 0
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&& true_regnum (XEXP (pattern,1)) >= 0 )
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{
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rtx x = XEXP (pattern,0);
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rtx next = next_real_insn (insn);
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rtx pat = PATTERN (next);
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rtx src = SET_SRC (pat);
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rtx t = XEXP (src,0);
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PUT_CODE (t, swap_condition (GET_CODE (t)));
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XEXP (pattern,0) = XEXP (pattern,1);
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XEXP (pattern,1) = x;
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INSN_CODE (next) = -1;
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}
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else if (true_regnum (XEXP (pattern, 0)) >= 0
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&& XEXP (pattern, 1) == const0_rtx)
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{
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/* This is a tst insn, we can reverse it. */
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rtx next = next_real_insn (insn);
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rtx pat = PATTERN (next);
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rtx src = SET_SRC (pat);
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rtx t = XEXP (src,0);
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PUT_CODE (t, swap_condition (GET_CODE (t)));
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XEXP (pattern, 1) = XEXP (pattern, 0);
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XEXP (pattern, 0) = const0_rtx;
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INSN_CODE (next) = -1;
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INSN_CODE (insn) = -1;
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}
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else if (true_regnum (XEXP (pattern,0)) >= 0
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&& GET_CODE (XEXP (pattern,1)) == CONST_INT)
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{
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rtx x = XEXP (pattern,1);
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rtx next = next_real_insn (insn);
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rtx pat = PATTERN (next);
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rtx src = SET_SRC (pat);
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rtx t = XEXP (src,0);
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enum machine_mode mode = GET_MODE (XEXP (pattern, 0));
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/* Now we work under compare insn with difficult branch. */
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rtx next = next_real_insn (insn);
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rtx pat = PATTERN (next);
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if (avr_simplify_comparison_p (mode, GET_CODE (t), x))
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{
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XEXP (pattern, 1) = gen_int_mode (INTVAL (x) + 1, mode);
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PUT_CODE (t, avr_normalize_condition (GET_CODE (t)));
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INSN_CODE (next) = -1;
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INSN_CODE (insn) = -1;
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}
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}
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}
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}
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pattern = SET_SRC (pattern);
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if (true_regnum (XEXP (pattern, 0)) >= 0
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&& true_regnum (XEXP (pattern, 1)) >= 0)
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{
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rtx x = XEXP (pattern, 0);
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rtx src = SET_SRC (pat);
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rtx t = XEXP (src,0);
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PUT_CODE (t, swap_condition (GET_CODE (t)));
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XEXP (pattern, 0) = XEXP (pattern, 1);
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XEXP (pattern, 1) = x;
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INSN_CODE (next) = -1;
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}
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else if (true_regnum (XEXP (pattern, 0)) >= 0
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&& XEXP (pattern, 1) == const0_rtx)
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{
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/* This is a tst insn, we can reverse it. */
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rtx src = SET_SRC (pat);
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rtx t = XEXP (src,0);
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PUT_CODE (t, swap_condition (GET_CODE (t)));
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XEXP (pattern, 1) = XEXP (pattern, 0);
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XEXP (pattern, 0) = const0_rtx;
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INSN_CODE (next) = -1;
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INSN_CODE (insn) = -1;
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}
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else if (true_regnum (XEXP (pattern, 0)) >= 0
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&& CONST_INT_P (XEXP (pattern, 1)))
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{
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rtx x = XEXP (pattern, 1);
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rtx src = SET_SRC (pat);
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rtx t = XEXP (src,0);
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enum machine_mode mode = GET_MODE (XEXP (pattern, 0));
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if (avr_simplify_comparison_p (mode, GET_CODE (t), x))
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{
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XEXP (pattern, 1) = gen_int_mode (INTVAL (x) + 1, mode);
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PUT_CODE (t, avr_normalize_condition (GET_CODE (t)));
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INSN_CODE (next) = -1;
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INSN_CODE (insn) = -1;
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}
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}
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}
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}
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}
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@ -56,6 +56,7 @@
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UNSPEC_FMULS
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UNSPEC_FMULSU
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UNSPEC_COPYSIGN
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UNSPEC_IDENTITY
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])
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(define_c_enum "unspecv"
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@ -3339,16 +3340,36 @@
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(define_insn "branch"
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[(set (pc)
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(if_then_else (match_operator 1 "simple_comparison_operator"
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[(cc0)
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(const_int 0)])
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[(cc0)
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(const_int 0)])
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(label_ref (match_operand 0 "" ""))
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(pc)))]
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""
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"*
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return ret_cond_branch (operands[1], avr_jump_mode (operands[0],insn), 0);"
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{
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return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 0);
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}
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[(set_attr "type" "branch")
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(set_attr "cc" "clobber")])
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;; Same as above but wrap SET_SRC so that this branch won't be transformed
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;; or optimized in the remainder.
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(define_insn "branch_unspec"
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[(set (pc)
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(unspec [(if_then_else (match_operator 1 "simple_comparison_operator"
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[(cc0)
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(const_int 0)])
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(label_ref (match_operand 0 "" ""))
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(pc))
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] UNSPEC_IDENTITY))]
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""
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{
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return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 0);
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}
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[(set_attr "type" "branch")
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(set_attr "cc" "none")])
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;; ****************************************************************
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;; AVR does not have following conditional jumps: LE,LEU,GT,GTU.
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;; Convert them all to proper jumps.
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