re PR target/80569 (i686: "shrx" instruction generated in 16-bit mode)
PR target/80569 * config/i386/i386.c (ix86_option_override_internal): Disable BMI, BMI2 and TBM instructions for -m16. testsuite/ChangeLog: PR target/80569 * gcc.target/i386/pr80569.c: New test. From-SVN: r250459
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4a15d84228
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4 changed files with 34 additions and 8 deletions
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@ -1,3 +1,9 @@
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2017-07-23 Uros Bizjak <ubizjak@gmail.com>
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PR target/80569
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* config/i386/i386.c (ix86_option_override_internal): Disable
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BMI, BMI2 and TBM instructions for -m16.
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2017-07-21 Carl Love <cel@us.ibm.com>
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* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
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@ -384,10 +390,10 @@
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2017-07-18 Robin Dapp <rdapp@linux.vnet.ibm.com>
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* tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Remove
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* tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Remove
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body_cost_vec from _vect_peel_extended_info.
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(vect_peeling_hash_get_lowest_cost): Do not set body_cost_vec.
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(vect_peeling_hash_choose_best_peeling): Remove body_cost_vec and
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(vect_peeling_hash_choose_best_peeling): Remove body_cost_vec and
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npeel.
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2017-07-18 Bin Cheng <bin.cheng@arm.com>
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@ -431,7 +437,7 @@
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2017-07-17 Yury Gribov <tetra2005@gmail.com>
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* tree-vrp.c (compare_assert_loc): Fix comparison function
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* tree-vrp.c (compare_assert_loc): Fix comparison function
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to return predictable results.
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2017-07-17 Claudiu Zissulescu <claziss@synopsys.com>
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@ -3422,11 +3428,11 @@
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2017-06-27 Jerome Lambourg <lambourg@adacore.com>
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* config/vxworks.h (VXWORKS_LIBS_RTP): Alternative definition for
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64bit configurations.
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(PTR_DIFF_TYPE): Alternative definition for TARGET_LP64.
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(SIZE_TYPE): Likewise.
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* config/vxworks.c (vxworks_emutls_var_fields): Use
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long_unsigned_type_node instead of unsigned_type_node as the offset
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64bit configurations.
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(PTR_DIFF_TYPE): Alternative definition for TARGET_LP64.
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(SIZE_TYPE): Likewise.
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* config/vxworks.c (vxworks_emutls_var_fields): Use
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long_unsigned_type_node instead of unsigned_type_node as the offset
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field type, which is "pointer" mode in emutls.c.
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2017-06-27 Jakub Jelinek <jakub@redhat.com>
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@ -6284,6 +6284,12 @@ ix86_option_override_internal (bool main_args_p,
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opts->x_ix86_isa_flags
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|= OPTION_MASK_ISA_LZCNT & ~opts->x_ix86_isa_flags_explicit;
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/* Disable BMI, BMI2 and TBM instructions for -m16. */
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if (TARGET_16BIT_P(opts->x_ix86_isa_flags))
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opts->x_ix86_isa_flags
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&= ~((OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_TBM)
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& ~opts->x_ix86_isa_flags_explicit);
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/* Validate -mpreferred-stack-boundary= value or default it to
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PREFERRED_STACK_BOUNDARY_DEFAULT. */
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ix86_preferred_stack_boundary = PREFERRED_STACK_BOUNDARY_DEFAULT;
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@ -1,3 +1,8 @@
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2017-07-23 Uros Bizjak <ubizjak@gmail.com>
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PR target/80569
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* gcc.target/i386/pr80569.c: New test.
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2017-07-21 Carl Love <cel@us.ibm.com>
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* gcc.target/powerpc/builtins-2.c (vmulosh, vmulouh, vmulesh,
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9
gcc/testsuite/gcc.target/i386/pr80569.c
Normal file
9
gcc/testsuite/gcc.target/i386/pr80569.c
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/* PR target/80569 */
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/* { dg-do assemble } */
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/* { dg-options "-O2 -m16 -march=haswell" } */
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void load_kernel(void *setup_addr)
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{
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unsigned int seg = (unsigned int)setup_addr >> 4;
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asm("movl %0, %%es" : : "r"(seg));
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}
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