i386: Fix ix86_hard_regno_mode_ok for TDmode on 32bit targets [PR101346]
General regs on 32bit targets do not support 128bit modes, including TDmode. gcc/ 2021-07-15 Uroš Bizjak <ubizjak@gmail.com> PR target/101346 * config/i386/i386.h (VALID_SSE_REG_MODE): Add TDmode. (VALID_INT_MODE_P): Add SDmode and DDmode. Add TDmode for TARGET_64BIT. (VALID_DFP_MODE_P): Remove. * config/i386/i386.c (ix86_hard_regno_mode_ok): Do not use VALID_DFP_MODE_P. gcc/testsuite/ 2021-07-15 Uroš Bizjak <ubizjak@gmail.com> PR target/101346 * gcc.target/i386/pr101346.c: New test.
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3 changed files with 15 additions and 10 deletions
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@ -19535,11 +19535,8 @@ ix86_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
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return !can_create_pseudo_p ();
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}
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/* We handle both integer and floats in the general purpose registers. */
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else if (VALID_INT_MODE_P (mode))
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return true;
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else if (VALID_FP_MODE_P (mode))
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return true;
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else if (VALID_DFP_MODE_P (mode))
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else if (VALID_INT_MODE_P (mode)
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|| VALID_FP_MODE_P (mode))
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return true;
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/* Lots of MMX code casts 8 byte vector modes to DImode. If we then go
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on to use that value in smaller contexts, this can easily force a
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@ -1023,7 +1023,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
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#define VALID_SSE_REG_MODE(MODE) \
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((MODE) == V1TImode || (MODE) == TImode \
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|| (MODE) == V4SFmode || (MODE) == V4SImode \
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|| (MODE) == SFmode || (MODE) == TFmode)
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|| (MODE) == SFmode || (MODE) == TFmode || (MODE) == TDmode)
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#define VALID_MMX_REG_MODE_3DNOW(MODE) \
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((MODE) == V2SFmode || (MODE) == SFmode)
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@ -1037,9 +1037,6 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
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#define VALID_MASK_AVX512BW_MODE(MODE) ((MODE) == SImode || (MODE) == DImode)
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#define VALID_DFP_MODE_P(MODE) \
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((MODE) == SDmode || (MODE) == DDmode || (MODE) == TDmode)
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#define VALID_FP_MODE_P(MODE) \
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((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode \
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|| (MODE) == SCmode || (MODE) == DCmode || (MODE) == XCmode) \
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@ -1049,12 +1046,13 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
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|| (MODE) == SImode || (MODE) == DImode \
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|| (MODE) == CQImode || (MODE) == CHImode \
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|| (MODE) == CSImode || (MODE) == CDImode \
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|| (MODE) == SDmode || (MODE) == DDmode \
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|| (MODE) == V4QImode || (MODE) == V2HImode || (MODE) == V1SImode \
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|| (TARGET_64BIT \
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&& ((MODE) == TImode || (MODE) == CTImode \
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|| (MODE) == TFmode || (MODE) == TCmode \
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|| (MODE) == V8QImode || (MODE) == V4HImode \
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|| (MODE) == V2SImode)))
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|| (MODE) == V2SImode || (MODE) == TDmode)))
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/* Return true for modes passed in SSE registers. */
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#define SSE_REG_MODE_P(MODE) \
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10
gcc/testsuite/gcc.target/i386/pr101346.c
Normal file
10
gcc/testsuite/gcc.target/i386/pr101346.c
Normal file
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@ -0,0 +1,10 @@
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/* PR target/101346 */
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/* { dg-do compile } */
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/* { dg-options "-O0 -fprofile-generate -msse" } */
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/* { dg-require-profiling "-fprofile-generate" } */
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_Decimal128
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foo (_Decimal128 x)
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{
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return - __builtin_fabsd128 (x);
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}
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