tree-pass.h (make_pass_live_range_shrinkage): New external.
2013-11-06 Vladimir Makarov <vmakarov@redhat.com> * tree-pass.h (make_pass_live_range_shrinkage): New external. * timevar.def (TV_LIVE_RANGE_SHRINKAGE): New. * sched-rgn.c (gate_handle_live_range_shrinkage): New. (rest_of_handle_live_range_shrinkage): Ditto (class pass_live_range_shrinkage): Ditto. (pass_data_live_range_shrinkage): Ditto. (make_pass_live_range_shrinkage): Ditto. * sched-int.h (initialize_live_range_shrinkage): New prototype. (finish_live_range_shrinkage): Ditto. * sched-deps.c (create_insn_reg_set): Make void return value. * passes.def: Add pass_live_range_shrinkage. * ira.c (update_equiv_regs): Don't move if flag_live_range_shrinkage. * haifa-sched.c (live_range_shrinkage_p): New. (initialize_live_range_shrinkage, finish_live_range_shrinkage): New functions. (rank_for_schedule): Add code for pressure relief through live range shrinkage. (schedule_insn): Print more debug info. (sched_init): Setup SCHED_PRESSURE_WEIGHTED for pressure relief through live range shrinkage. * doc/invoke.texi (-flive-range-shrinkage): New. * common.opt (flive-range-shrinkage): New. From-SVN: r204465
This commit is contained in:
Vladimir Makarov
Vladimir Makarov
parent
992147ee6b
commit
f20f261304
11 changed files with 160 additions and 16 deletions
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@ -1,3 +1,29 @@
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2013-11-06 Vladimir Makarov <vmakarov@redhat.com>
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* tree-pass.h (make_pass_live_range_shrinkage): New external.
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* timevar.def (TV_LIVE_RANGE_SHRINKAGE): New.
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* sched-rgn.c (gate_handle_live_range_shrinkage): New.
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(rest_of_handle_live_range_shrinkage): Ditto
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(class pass_live_range_shrinkage): Ditto.
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(pass_data_live_range_shrinkage): Ditto.
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(make_pass_live_range_shrinkage): Ditto.
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* sched-int.h (initialize_live_range_shrinkage): New prototype.
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(finish_live_range_shrinkage): Ditto.
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* sched-deps.c (create_insn_reg_set): Make void return value.
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* passes.def: Add pass_live_range_shrinkage.
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* ira.c (update_equiv_regs): Don't move if
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flag_live_range_shrinkage.
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* haifa-sched.c (live_range_shrinkage_p): New.
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(initialize_live_range_shrinkage, finish_live_range_shrinkage):
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New functions.
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(rank_for_schedule): Add code for pressure relief through live
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range shrinkage.
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(schedule_insn): Print more debug info.
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(sched_init): Setup SCHED_PRESSURE_WEIGHTED for pressure relief
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through live range shrinkage.
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* doc/invoke.texi (-flive-range-shrinkage): New.
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* common.opt (flive-range-shrinkage): New.
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2013-11-06 Uros Bizjak <ubizjak@gmail.com>
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PR target/59021
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@ -1738,6 +1738,10 @@ fregmove
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Common Ignore
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Does nothing. Preserved for backward compatibility.
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flive-range-shrinkage
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Common Report Var(flag_live_range_shrinkage) Init(0) Optimization
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Relief of register pressure through live range shrinkage
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frename-registers
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Common Report Var(flag_rename_registers) Init(2) Optimization
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Perform a register renaming optimization pass
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@ -377,7 +377,7 @@ Objective-C and Objective-C++ Dialects}.
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-fira-region=@var{region} -fira-hoist-pressure @gol
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-fira-loop-pressure -fno-ira-share-save-slots @gol
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-fno-ira-share-spill-slots -fira-verbose=@var{n} @gol
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-fivopts -fkeep-inline-functions -fkeep-static-consts @gol
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-fivopts -fkeep-inline-functions -fkeep-static-consts -flive-range-shrinkage @gol
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-floop-block -floop-interchange -floop-strip-mine -floop-nest-optimize @gol
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-floop-parallelize-all -flto -flto-compression-level @gol
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-flto-partition=@var{alg} -flto-report -flto-report-wpa -fmerge-all-constants @gol
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@ -7268,6 +7268,12 @@ registers after writing to their lower 32-bit half.
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Enabled for x86 at levels @option{-O2}, @option{-O3}.
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@item -flive-range-shrinkage
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@opindex flive-range-shrinkage
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Attempt to decrease register pressure through register live range
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shrinkage. This is helpful for fast processors with small or moderate
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size register sets.
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@item -fira-algorithm=@var{algorithm}
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Use the specified coloring algorithm for the integrated register
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allocator. The @var{algorithm} argument can be @samp{priority}, which
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@ -150,6 +150,24 @@ along with GCC; see the file COPYING3. If not see
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#ifdef INSN_SCHEDULING
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/* True if we do register pressure relief through live-range
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shrinkage. */
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static bool live_range_shrinkage_p;
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/* Switch on live range shrinkage. */
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void
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initialize_live_range_shrinkage (void)
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{
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live_range_shrinkage_p = true;
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}
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/* Switch off live range shrinkage. */
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void
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finish_live_range_shrinkage (void)
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{
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live_range_shrinkage_p = false;
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}
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/* issue_rate is the number of insns that can be scheduled in the same
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machine cycle. It can be defined in the config/mach/mach.h file,
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otherwise we set it to 1. */
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@ -2519,7 +2537,7 @@ rank_for_schedule (const void *x, const void *y)
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rtx tmp = *(const rtx *) y;
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rtx tmp2 = *(const rtx *) x;
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int tmp_class, tmp2_class;
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int val, priority_val, info_val;
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int val, priority_val, info_val, diff;
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if (MAY_HAVE_DEBUG_INSNS)
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{
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@ -2532,6 +2550,22 @@ rank_for_schedule (const void *x, const void *y)
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return INSN_LUID (tmp) - INSN_LUID (tmp2);
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}
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if (live_range_shrinkage_p)
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{
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/* Don't use SCHED_PRESSURE_MODEL -- it results in much worse
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code. */
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gcc_assert (sched_pressure == SCHED_PRESSURE_WEIGHTED);
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if ((INSN_REG_PRESSURE_EXCESS_COST_CHANGE (tmp) < 0
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|| INSN_REG_PRESSURE_EXCESS_COST_CHANGE (tmp2) < 0)
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&& (diff = (INSN_REG_PRESSURE_EXCESS_COST_CHANGE (tmp)
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- INSN_REG_PRESSURE_EXCESS_COST_CHANGE (tmp2))) != 0)
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return diff;
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/* Sort by INSN_LUID (original insn order), so that we make the
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sort stable. This minimizes instruction movement, thus
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minimizing sched's effect on debugging and cross-jumping. */
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return INSN_LUID (tmp) - INSN_LUID (tmp2);
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}
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/* The insn in a schedule group should be issued the first. */
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if (flag_sched_group_heuristic &&
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SCHED_GROUP_P (tmp) != SCHED_GROUP_P (tmp2))
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@ -2542,8 +2576,6 @@ rank_for_schedule (const void *x, const void *y)
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if (sched_pressure != SCHED_PRESSURE_NONE)
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{
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int diff;
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/* Prefer insn whose scheduling results in the smallest register
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pressure excess. */
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if ((diff = (INSN_REG_PRESSURE_EXCESS_COST_CHANGE (tmp)
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@ -3731,7 +3763,10 @@ schedule_insn (rtx insn)
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{
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fputc (':', sched_dump);
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for (i = 0; i < ira_pressure_classes_num; i++)
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fprintf (sched_dump, "%s%+d(%d)",
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fprintf (sched_dump, "%s%s%+d(%d)",
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scheduled_insns.length () > 1
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&& INSN_LUID (insn)
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< INSN_LUID (scheduled_insns[scheduled_insns.length () - 2]) ? "@" : "",
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reg_class_names[ira_pressure_classes[i]],
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pressure_info[i].set_increase, pressure_info[i].change);
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}
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@ -6578,9 +6613,11 @@ sched_init (void)
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if (targetm.sched.dispatch (NULL_RTX, IS_DISPATCH_ON))
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targetm.sched.dispatch_do (NULL_RTX, DISPATCH_INIT);
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if (flag_sched_pressure
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&& !reload_completed
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&& common_sched_info->sched_pass_id == SCHED_RGN_PASS)
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if (live_range_shrinkage_p)
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sched_pressure = SCHED_PRESSURE_WEIGHTED;
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else if (flag_sched_pressure
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&& !reload_completed
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&& common_sched_info->sched_pass_id == SCHED_RGN_PASS)
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sched_pressure = ((enum sched_pressure_algorithm)
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PARAM_VALUE (PARAM_SCHED_PRESSURE_ALGORITHM));
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else
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11
gcc/ira.c
11
gcc/ira.c
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@ -3794,11 +3794,12 @@ update_equiv_regs (void)
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if (! reg_equiv[regno].replace
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|| reg_equiv[regno].loop_depth < loop_depth
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/* There is no sense to move insns if we did
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register pressure-sensitive scheduling was
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done because it will not improve allocation
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but worsen insn schedule with a big
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probability. */
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/* There is no sense to move insns if live range
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shrinkage or register pressure-sensitive
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scheduling were done because it will not
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improve allocation but worsen insn schedule
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with a big probability. */
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|| flag_live_range_shrinkage
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|| (flag_sched_pressure && flag_schedule_insns))
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continue;
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@ -366,6 +366,7 @@ along with GCC; see the file COPYING3. If not see
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NEXT_PASS (pass_mode_switching);
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NEXT_PASS (pass_match_asm_constraints);
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NEXT_PASS (pass_sms);
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NEXT_PASS (pass_live_range_shrinkage);
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NEXT_PASS (pass_sched);
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NEXT_PASS (pass_ira);
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NEXT_PASS (pass_reload);
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@ -1938,8 +1938,8 @@ create_insn_reg_use (int regno, rtx insn)
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return use;
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}
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/* Allocate and return reg_set_data structure for REGNO and INSN. */
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static struct reg_set_data *
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/* Allocate reg_set_data structure for REGNO and INSN. */
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static void
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create_insn_reg_set (int regno, rtx insn)
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{
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struct reg_set_data *set;
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@ -1949,7 +1949,6 @@ create_insn_reg_set (int regno, rtx insn)
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set->insn = insn;
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set->next_insn_set = INSN_REG_SET_LIST (insn);
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INSN_REG_SET_LIST (insn) = set;
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return set;
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}
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/* Set up insn register uses for INSN and dependency context DEPS. */
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@ -1333,6 +1333,8 @@ extern void debug_ds (ds_t);
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/* Functions in haifa-sched.c. */
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extern void initialize_live_range_shrinkage (void);
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extern void finish_live_range_shrinkage (void);
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extern void sched_init_region_reg_pressure_info (void);
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extern int haifa_classify_insn (const_rtx);
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extern void get_ebb_head_tail (basic_block, basic_block, rtx *, rtx *);
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@ -3564,6 +3564,33 @@ advance_target_bb (basic_block bb, rtx insn)
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#endif
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static bool
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gate_handle_live_range_shrinkage (void)
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{
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#ifdef INSN_SCHEDULING
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return flag_live_range_shrinkage;
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#else
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return 0;
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#endif
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}
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/* Run instruction scheduler. */
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static unsigned int
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rest_of_handle_live_range_shrinkage (void)
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{
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#ifdef INSN_SCHEDULING
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int saved;
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initialize_live_range_shrinkage ();
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saved = flag_schedule_interblock;
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flag_schedule_interblock = false;
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schedule_insns ();
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flag_schedule_interblock = saved;
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finish_live_range_shrinkage ();
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#endif
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return 0;
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}
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static bool
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gate_handle_sched (void)
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{
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@ -3622,6 +3649,45 @@ rest_of_handle_sched2 (void)
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namespace {
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const pass_data pass_data_live_range_shrinkage =
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{
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RTL_PASS, /* type */
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"lr_shrinkage", /* name */
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OPTGROUP_NONE, /* optinfo_flags */
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true, /* has_gate */
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true, /* has_execute */
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TV_LIVE_RANGE_SHRINKAGE, /* tv_id */
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0, /* properties_required */
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0, /* properties_provided */
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0, /* properties_destroyed */
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0, /* todo_flags_start */
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( TODO_df_finish | TODO_verify_rtl_sharing
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| TODO_verify_flow ), /* todo_flags_finish */
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};
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class pass_live_range_shrinkage : public rtl_opt_pass
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{
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public:
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pass_live_range_shrinkage(gcc::context *ctxt)
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: rtl_opt_pass(pass_data_live_range_shrinkage, ctxt)
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{}
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/* opt_pass methods: */
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bool gate () { return gate_handle_live_range_shrinkage (); }
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unsigned int execute () { return rest_of_handle_live_range_shrinkage (); }
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}; // class pass_live_range_shrinkage
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} // anon namespace
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rtl_opt_pass *
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make_pass_live_range_shrinkage (gcc::context *ctxt)
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{
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return new pass_live_range_shrinkage (ctxt);
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}
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namespace {
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const pass_data pass_data_sched =
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{
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RTL_PASS, /* type */
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@ -224,6 +224,7 @@ DEFTIMEVAR (TV_COMBINE , "combiner")
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DEFTIMEVAR (TV_IFCVT , "if-conversion")
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DEFTIMEVAR (TV_MODE_SWITCH , "mode switching")
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DEFTIMEVAR (TV_SMS , "sms modulo scheduling")
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DEFTIMEVAR (TV_LIVE_RANGE_SHRINKAGE , "live range shrinkage")
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DEFTIMEVAR (TV_SCHED , "scheduling")
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DEFTIMEVAR (TV_IRA , "integrated RA")
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DEFTIMEVAR (TV_LRA , "LRA non-specific")
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@ -531,6 +531,7 @@ extern rtl_opt_pass *make_pass_lower_subreg2 (gcc::context *ctxt);
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extern rtl_opt_pass *make_pass_mode_switching (gcc::context *ctxt);
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extern rtl_opt_pass *make_pass_sms (gcc::context *ctxt);
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extern rtl_opt_pass *make_pass_sched (gcc::context *ctxt);
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extern rtl_opt_pass *make_pass_live_range_shrinkage (gcc::context *ctxt);
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extern rtl_opt_pass *make_pass_ira (gcc::context *ctxt);
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extern rtl_opt_pass *make_pass_reload (gcc::context *ctxt);
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extern rtl_opt_pass *make_pass_clean_state (gcc::context *ctxt);
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